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Merge branch 'master' of git://git.denx.de/u-boot-sunxi
[platform/kernel/u-boot.git]
/
include
/
configs
/
strider.h
diff --git
a/include/configs/strider.h
b/include/configs/strider.h
index
20ffc0c
..
972543d
100644
(file)
--- a/
include/configs/strider.h
+++ b/
include/configs/strider.h
@@
-1,9
+1,8
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2014
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH,
eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH,
dirk.eibach@gdsys.cc
*
*
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
*/
#ifndef __CONFIG_H
@@
-18,32
+17,7
@@
#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */
#define CONFIG_STRIDER 1 /* STRIDER board specific */
#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */
#define CONFIG_STRIDER 1 /* STRIDER board specific */
-#define CONFIG_SYS_TEXT_BASE 0xFE000000
-
-#ifdef CONFIG_STRIDER_CPU
-#define CONFIG_IDENT_STRING " strider cpu 0.01"
-#elif defined(CONFIG_STRIDER_CON_DP)
-#define CONFIG_IDENT_STRING " strider con dp 0.01"
-#else
-#define CONFIG_IDENT_STRING " strider con 0.01"
-#endif
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_EARLY_INIT_R
-#define CONFIG_LAST_STAGE_INIT
-
-#define CONFIG_MMC
-#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
-
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_CMD_FPGAD
-#define CONFIG_CMD_IOLOOP
/*
* System Clock Setup
/*
* System Clock Setup
@@
-227,15
+201,12
@@
/*
* FLASH on the Local Bus
*/
/*
* FLASH on the Local Bus
*/
-#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
-#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_FLASH_LEGACY_512Kx16
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_FLASH_LEGACY_512Kx16
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
-#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
@@
-297,7
+268,6
@@
/*
* Serial Port
*/
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
@@
-318,8
+288,6
@@
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_PCA953X /* NXP PCA9554 */
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_PCA953X /* NXP PCA9554 */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x24, 16}, {0x25, 16}, {0x26, 16}, \
{0x3c, 8}, {0x3d, 8}, {0x3e, 8} }
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x24, 16}, {0x25, 16}, {0x26, 16}, \
{0x3c, 8}, {0x3d, 8}, {0x3e, 8} }
@@
-414,6
+382,12
@@
#define CONFIG_SYS_DP501_I2C {1, 3, 5, 7, 2, 4, 6, 8}
#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
{12, 0x4c} }
#define CONFIG_SYS_DP501_I2C {1, 3, 5, 7, 2, 4, 6, 8}
#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
{12, 0x4c} }
+#elif defined(CONFIG_STRIDER_CPU_DP)
+#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4}
+#define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
+#define CONFIG_SYS_DP501_I2C {1, 2, 3, 4}
+#define CONFIG_STRIDER_FANS { {6, 0x4c}, {7, 0x4c}, \
+ {8, 0x4c} }
#else
#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4}
#define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
#else
#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4}
#define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
@@
-510,26
+484,21
@@
void fpga_control_clear(unsigned int bus, int pin);
/* enable PCIE clock */
#define CONFIG_SYS_SCCR_PCIEXP1CM 1
/* enable PCIE clock */
#define CONFIG_SYS_SCCR_PCIEXP1CM 1
-#define CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-
#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1
/*
* TSEC
*/
#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1
/*
* TSEC
*/
-#define CONFIG_TSEC_ENET /* TSEC ethernet support */
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET)
/*
* TSEC ethernet configuration
*/
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET)
/*
* TSEC ethernet configuration
*/
-#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_TSEC1
#define CONFIG_TSEC1_NAME "eTSEC0"
#define TSEC1_PHY_ADDR 1
#define CONFIG_TSEC1
#define CONFIG_TSEC1_NAME "eTSEC0"
#define TSEC1_PHY_ADDR 1
@@
-543,7
+512,6
@@
void fpga_control_clear(unsigned int bus, int pin);
* Environment
*/
#if 1
* Environment
*/
#if 1
-#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */
@@
-551,7
+519,6
@@
void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#else
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#else
-#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#endif
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#endif
@@
-561,27
+528,15
@@
void fpga_control_clear(unsigned int bus, int pin);
/*
* Command line configuration.
*/
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
-
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
-#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
@@
-647,13
+602,10
@@
void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_HAS_ETH0
#endif
#define CONFIG_HAS_ETH0
#endif
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */
-#define CONFIG_HOSTNAME
hrcon
+#define CONFIG_HOSTNAME
"hrcon"
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"