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global: Migrate CONFIG_STACKBASE to CFG
[platform/kernel/u-boot.git]
/
include
/
configs
/
socfpga_soc64_common.h
diff --git
a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index
c388ae9
..
66ecb16
100644
(file)
--- a/
include/configs/socfpga_soc64_common.h
+++ b/
include/configs/socfpga_soc64_common.h
@@
-22,13
+22,12
@@
*/
/* Extend size of kernel image for uncompression */
*/
/* Extend size of kernel image for uncompression */
-#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/*
* U-Boot run time memory configurations
*/
/*
* U-Boot run time memory configurations
*/
-#define C
ONFIG_SYS_INIT_RAM_ADDR
0xFFE00000
-#define C
ONFIG_SYS_INIT_RAM_SIZE
0x40000
+#define C
FG_SYS_INIT_RAM_ADDR
0xFFE00000
+#define C
FG_SYS_INIT_RAM_SIZE
0x40000
/*
* U-Boot environment configurations
/*
* U-Boot environment configurations
@@
-37,7
+36,7
@@
/*
* Environment variable
*/
/*
* Environment variable
*/
-#define C
ONFI
G_EXTRA_ENV_SETTINGS \
+#define C
F
G_EXTRA_ENV_SETTINGS \
"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"bootfile=" CONFIG_BOOTFILE "\0" \
"fdt_addr=8000000\0" \
"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"bootfile=" CONFIG_BOOTFILE "\0" \
"fdt_addr=8000000\0" \
@@
-71,40
+70,30
@@
*/
#define PHYS_SDRAM_1 0x0
#define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024)
*/
#define PHYS_SDRAM_1 0x0
#define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024)
-#define C
ONFIG_SYS_SDRAM_BASE
0
+#define C
FG_SYS_SDRAM_BASE
0
/*
* Serial / UART configurations
*/
/*
* Serial / UART configurations
*/
-#define CONFIG_SYS_NS16550_CLK 100000000
-#define CONFIG_SYS_NS16550_MEM32
+#define CFG_SYS_NS16550_CLK 100000000
/*
* SDMMC configurations
*/
/*
* SDMMC configurations
*/
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256
-#endif
/*
* Flash configurations
*/
/*
* Flash configurations
*/
-/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_DW_ALTDESCRIPTOR
-#endif /* CONFIG_CMD_NET */
-
/*
* L4 Watchdog
*/
/*
* L4 Watchdog
*/
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
#ifndef __ASSEMBLY__
unsigned int cm_get_l4_sys_free_clk_hz(void);
#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
#ifndef __ASSEMBLY__
unsigned int cm_get_l4_sys_free_clk_hz(void);
-#define C
ONFIG_DW_WDT_CLOCK_KHZ
(cm_get_l4_sys_free_clk_hz() / 1000)
+#define C
FG_DW_WDT_CLOCK_KHZ
(cm_get_l4_sys_free_clk_hz() / 1000)
#endif
#else
#endif
#else
-#define C
ONFIG_DW_WDT_CLOCK_KHZ
100000
+#define C
FG_DW_WDT_CLOCK_KHZ
100000
#endif
/*
#endif
/*