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Prepare v2023.10
[platform/kernel/u-boot.git]
/
include
/
configs
/
smartweb.h
diff --git
a/include/configs/smartweb.h
b/include/configs/smartweb.h
index
65bc3c6
..
75a1670
100644
(file)
--- a/
include/configs/smartweb.h
+++ b/
include/configs/smartweb.h
@@
-30,14
+30,14
@@
#include <linux/sizes.h>
/*
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_
SYS_
TEXT_BASE requires adapting the initial boot
+ * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot
* program. Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
/* ARM asynchronous clock */
* program. Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
/* ARM asynchronous clock */
-#define C
ONFIG_SYS_AT91_SLOW_CLOCK
32768 /* slow clock xtal */
-#define C
ONFIG_SYS_AT91_MAIN_CLOCK
18432000 /* 18.432MHz crystal */
+#define C
FG_SYS_AT91_SLOW_CLOCK
32768 /* slow clock xtal */
+#define C
FG_SYS_AT91_MAIN_CLOCK
18432000 /* 18.432MHz crystal */
/* misc settings */
/* misc settings */
@@
-45,8
+45,8
@@
* SDRAM: 1 bank, 64 MB, base address 0x20000000
* Already initialized before u-boot gets started.
*/
* SDRAM: 1 bank, 64 MB, base address 0x20000000
* Already initialized before u-boot gets started.
*/
-#define C
ONFIG_SYS_SDRAM_BASE
ATMEL_BASE_CS1
-#define C
ONFIG_SYS_SDRAM_SIZE
(64 * SZ_1M)
+#define C
FG_SYS_SDRAM_BASE
ATMEL_BASE_CS1
+#define C
FG_SYS_SDRAM_SIZE
(64 * SZ_1M)
/*
* Perform a SDRAM Memtest from the start of SDRAM
/*
* Perform a SDRAM Memtest from the start of SDRAM
@@
-54,24
+54,15
@@
*/
/* NAND flash settings */
*/
/* NAND flash settings */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
-#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
-#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+#define CFG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CFG_SYS_NAND_MASK_ALE (1 << 21)
+#define CFG_SYS_NAND_MASK_CLE (1 << 22)
+#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13
/* serial console */
/* serial console */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
-/* USB configuration */
-#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
-
-/* USB DFU support */
-
-#define CONFIG_USB_GADGET_AT91
+#define CFG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_ID ATMEL_ID_SYS
/* DFU class support */
#define DFU_MANIFEST_POLL_TIMEOUT 25000
/* DFU class support */
#define DFU_MANIFEST_POLL_TIMEOUT 25000
@@
-82,7
+73,7
@@
* Predefined environment variables.
* Usefull to define some easy to use boot commands.
*/
* Predefined environment variables.
* Usefull to define some easy to use boot commands.
*/
-#define C
ONFIG_EXTRA_ENV_SETTINGS
\
+#define C
FG_EXTRA_ENV_SETTINGS
\
\
"basicargs=console=ttyS0,115200\0" \
\
\
"basicargs=console=ttyS0,115200\0" \
\
@@
-92,28
+83,26
@@
* leaving the correct space for initial global data structure above that
* address while providing maximum stack area below.
*/
* leaving the correct space for initial global data structure above that
* address while providing maximum stack area below.
*/
-#define C
ONFIG_SYS_INIT_RAM_SIZE
0x1000
-#define C
ONFIG_SYS_INIT_RAM_ADDR
ATMEL_BASE_SRAM1
+#define C
FG_SYS_INIT_RAM_SIZE
0x1000
+#define C
FG_SYS_INIT_RAM_ADDR
ATMEL_BASE_SRAM1
/* Defines for SPL */
/* Defines for SPL */
-#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
-#define CONFIG_SYS_NAND_SIZE (SZ_256M)
-#define CONFIG_SYS_NAND_ECCSIZE 256
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
+#define CFG_SYS_NAND_ECCSIZE 256
+#define CFG_SYS_NAND_ECCBYTES 3
+#define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63, }
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63, }
-#define C
ONFIG_SYS_MASTER_CLOCK
(198656000/2)
+#define C
FG_SYS_MASTER_CLOCK
(198656000/2)
#define AT91_PLL_LOCK_TIMEOUT 1000000
#define AT91_PLL_LOCK_TIMEOUT 1000000
-#define C
ONFIG_SYS_AT91_PLLA
0x2060bf09
-#define C
ONFIG_SYS_MCKR
0x100
-#define C
ONFIG_SYS_MCKR_CSS (0x02 | CONFI
G_SYS_MCKR)
-#define C
ONFIG_SYS_AT91_PLLB
0x10483f0e
+#define C
FG_SYS_AT91_PLLA
0x2060bf09
+#define C
FG_SYS_MCKR
0x100
+#define C
FG_SYS_MCKR_CSS (0x02 | CF
G_SYS_MCKR)
+#define C
FG_SYS_AT91_PLLB
0x10483f0e
#endif /* __CONFIG_H */
#endif /* __CONFIG_H */