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SPDX: Convert all of our single license tags to Linux Kernel style
[platform/kernel/u-boot.git]
/
include
/
configs
/
sh7785lcr.h
diff --git
a/include/configs/sh7785lcr.h
b/include/configs/sh7785lcr.h
index
d4477c2
..
38ae66b
100644
(file)
--- a/
include/configs/sh7785lcr.h
+++ b/
include/configs/sh7785lcr.h
@@
-1,20
+1,14
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the Renesas Technology R0P7785LC0011RL board
*
* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
/*
* Configuation settings for the Renesas Technology R0P7785LC0011RL board
*
* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SH7785LCR_H
#define __SH7785LCR_H
#define CONFIG_CPU_SH7785 1
*/
#ifndef __SH7785LCR_H
#define __SH7785LCR_H
#define CONFIG_CPU_SH7785 1
-#define CONFIG_SH7785LCR 1
-
-#define CONFIG_CMD_SH_ZIMAGEBOOT
-
-#define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp"
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevice=0:1\0" \
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevice=0:1\0" \
@@
-25,7
+19,6
@@
/* MEMORY */
#if defined(CONFIG_SH_32BIT)
/* MEMORY */
#if defined(CONFIG_SH_32BIT)
-#define CONFIG_SYS_TEXT_BASE 0x8FF80000
/* 0x40000000 - 0x47FFFFFF does not use */
#define CONFIG_SH_SDRAM_OFFSET (0x8000000)
#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET)
/* 0x40000000 - 0x47FFFFFF does not use */
#define CONFIG_SH_SDRAM_OFFSET (0x8000000)
#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET)
@@
-35,7
+28,6
@@
#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024)
#define SH7785LCR_USB_BASE (0xa6000000)
#else
#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024)
#define SH7785LCR_USB_BASE (0xa6000000)
#else
-#define CONFIG_SYS_TEXT_BASE 0x0FF80000
#define SH7785LCR_SDRAM_BASE (0x08000000)
#define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024)
#define SH7785LCR_FLASH_BASE_1 (0xa0000000)
#define SH7785LCR_SDRAM_BASE (0x08000000)
#define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024)
#define SH7785LCR_FLASH_BASE_1 (0xa0000000)
@@
-43,11
+35,7
@@
#define SH7785LCR_USB_BASE (0xb4000000)
#endif
#define SH7785LCR_USB_BASE (0xb4000000)
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_PBSIZE 256
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE 512
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
@@
-58,7
+46,6
@@
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(SH7785LCR_SDRAM_SIZE) - \
4 * 1024 * 1024)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(SH7785LCR_SDRAM_SIZE) - \
4 * 1024 * 1024)
-#undef CONFIG_SYS_ALT_MEMTEST
#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE