#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_NR_DRAM_BANKS 1
#define SDRAM_BANK_SIZE (2UL << 30)
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_NR_DRAM_BANKS 1
#define SDRAM_BANK_SIZE (2UL << 30)
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00000000\0" \
"pxefile_addr_r=0x00100000\0" \
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00000000\0" \
"pxefile_addr_r=0x00100000\0" \