projects
/
platform
/
kernel
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
global: Migrate CONFIG_MXC_UART_BASE to CFG
[platform/kernel/u-boot.git]
/
include
/
configs
/
pm9g45.h
diff --git
a/include/configs/pm9g45.h
b/include/configs/pm9g45.h
index
eab3825
..
686411e
100644
(file)
--- a/
include/configs/pm9g45.h
+++ b/
include/configs/pm9g45.h
@@
-16,42
+16,24
@@
#define __CONFIG_H
/* ARM asynchronous clock */
#define __CONFIG_H
/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-
-/* general purpose I/O */
-#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
+#define CFG_SYS_AT91_SLOW_CLOCK 32768
+#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
/* SDRAM */
/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE 0x70000000
-#define CONFIG_SYS_SDRAM_SIZE 0x08000000
-
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CFG_SYS_SDRAM_BASE 0x70000000
+#define CFG_SYS_SDRAM_SIZE 0x08000000
/* NAND flash */
#ifdef CONFIG_CMD_NAND
/* NAND flash */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
+#define CFG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */
/* our ALE is AD21 */
-#define C
ONFIG_SYS_NAND_MASK_ALE
BIT(21)
+#define C
FG_SYS_NAND_MASK_ALE
BIT(21)
/* our CLE is AD22 */
/* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE BIT(22)
-#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3
-#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
+#define CFG_SYS_NAND_MASK_CLE BIT(22)
+#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CFG_SYS_NAND_READY_PIN AT91_PIN_PD3
#endif
#endif
-/* Ethernet */
-#define CONFIG_RESET_PHY_R
-#define CONFIG_AT91_WANTS_COMMON_PHY
-
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env in nandflash */
#elif CONFIG_SD_BOOT
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env in nandflash */
#elif CONFIG_SD_BOOT
@@
-59,35
+41,21
@@
#endif
/* Defines for SPL */
#endif
/* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE 0x010000
-#define CONFIG_SPL_STACK 0x310000
-
-#define CONFIG_SYS_MONITOR_LEN 0x80000
#ifdef CONFIG_SD_BOOT
#ifdef CONFIG_SD_BOOT
-
-#define CONFIG_SPL_BSS_START_ADDR 0x70000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
-#define CONFIG_SYS_SPL_MALLOC_START 0x70080000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
-
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
#elif CONFIG_NAND_BOOT
#elif CONFIG_NAND_BOOT
-#define CONFIG_SPL_NAND_SOFTECC
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
+#define CFG_SYS_NAND_U_BOOT_SIZE 0x80000
-#define C
ONFIG_SYS_NAND_ECCSIZE
256
-#define C
ONFIG_SYS_NAND_ECCBYTES
3
-#define C
ONFIG_SYS_NAND_ECCPOS
{ 40, 41, 42, 43, 44, 45, 46, 47, \
+#define C
FG_SYS_NAND_ECCSIZE
256
+#define C
FG_SYS_NAND_ECCBYTES
3
+#define C
FG_SYS_NAND_ECCPOS
{ 40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63, }
#endif
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63, }
#endif
-#define CONFIG_SPL_ATMEL_SIZE
-#define CONFIG_SYS_MASTER_CLOCK 132096000
-#define CONFIG_SYS_AT91_PLLA 0x20c73f03
-#define CONFIG_SYS_MCKR 0x1301
-#define CONFIG_SYS_MCKR_CSS 0x1302
+#define CFG_SYS_MASTER_CLOCK 132096000
+#define CFG_SYS_AT91_PLLA 0x20c73f03
+#define CFG_SYS_MCKR 0x1301
+#define CFG_SYS_MCKR_CSS 0x1302
#endif
#endif