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Merge branch 'master' of git://git.denx.de/u-boot-net
[platform/kernel/u-boot.git]
/
include
/
configs
/
ms7720se.h
diff --git
a/include/configs/ms7720se.h
b/include/configs/ms7720se.h
index
cc3217b
..
b159c10
100644
(file)
--- a/
include/configs/ms7720se.h
+++ b/
include/configs/ms7720se.h
@@
-1,16
+1,14
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the Hitachi Solution Engine 7720
*
* Copyright (C) 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
/*
* Configuation settings for the Hitachi Solution Engine 7720
*
* Copyright (C) 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MS7720SE_H
#define __MS7720SE_H
#define CONFIG_CPU_SH7720 1
*/
#ifndef __MS7720SE_H
#define __MS7720SE_H
#define CONFIG_CPU_SH7720 1
-#define CONFIG_MS7720SE 1
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
@@
-23,13
+21,7
@@
#define MS7720SE_FLASH_BASE_1 0xA0000000
#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
#define MS7720SE_FLASH_BASE_1 0xA0000000
#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
-#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
-#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
-/* Buffer size for Boot Arguments passed to kernel */
-#define CONFIG_SYS_BARGSIZE 512
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
@@
-68,9
+60,7
@@
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
/* PCMCIA */
#define CONFIG_IDE_PCMCIA 1
/* PCMCIA */
#define CONFIG_IDE_PCMCIA 1