-/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */
-#define SDRAM_CONFIG1 0x52222600
-#define SDRAM_CONFIG2 0x88b70000
-#define SDRAM_CONTROL 0x50570000
-#define SDRAM_MODE 0x008d0000
+/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
+#define SDRAM_CONFIG1 0x62322900
+#define SDRAM_CONFIG2 0x88c70000
+#define SDRAM_CONTROL 0x504f0000
+#define SDRAM_MODE 0x00cd0000