-/* Qixis */
-#define QIXIS_XMAP_MASK 0x07
-#define QIXIS_XMAP_SHIFT 5
-#define QIXIS_RST_CTL_RESET_EN 0x30
-#define QIXIS_LBMAP_DFLTBANK 0x00
-#define QIXIS_LBMAP_ALTBANK 0x20
-#define QIXIS_LBMAP_QSPI 0x00
-#define QIXIS_RCW_SRC_QSPI 0xff
-#define QIXIS_RST_CTL_RESET 0x31
-#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
-#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
-#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
-#define QIXIS_LBMAP_MASK 0x0f
-#define QIXIS_LBMAP_SD
-#define QIXIS_LBMAP_EMMC
-#define QIXIS_RCW_SRC_SD 0x08
-#define QIXIS_RCW_SRC_EMMC 0x09
-#define NON_EXTENDED_DUTCFG
-#define QIXIS_SDID_MASK 0x07
-#define QIXIS_ESDHC_NO_ADAPTER 0x7
-
-/* SYSCLK */
-#define QIXIS_SYSCLK_100 0x0
-#define QIXIS_SYSCLK_125 0x1
-#define QIXIS_SYSCLK_133 0x2
-
-/* DDRCLK */
-#define QIXIS_DDRCLK_100 0x0
-#define QIXIS_DDRCLK_125 0x1
-#define QIXIS_DDRCLK_133 0x2
-
-#define BRDCFG4_EMI1SEL_MASK 0xF8
-#define BRDCFG4_EMI1SEL_SHIFT 3
-#define BRDCFG4_EMI2SEL_MASK 0x07
-#define BRDCFG4_EMI2SEL_SHIFT 0
-
-/* VID */
-
-#define I2C_MUX_CH_VOL_MONITOR 0xA
-/* Voltage monitor on channel 2*/
-#define I2C_VOL_MONITOR_ADDR 0x63
-#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
-#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
-#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
-#define CONFIG_VID_FLS_ENV "lx2160aqds_vdd_mv"
-#define CONFIG_VID
-
-/* The lowest and highest voltage allowed*/
-#define VDD_MV_MIN 775
-#define VDD_MV_MAX 925
-
-/* PM Bus commands code for LTC3882*/
-#define PMBUS_CMD_PAGE 0x0
-#define PMBUS_CMD_READ_VOUT 0x8B
-#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
-#define PMBUS_CMD_VOUT_COMMAND 0x21
-#define PWM_CHANNEL0 0x0
-
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-