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env: Finish migration of common ENV options
[platform/kernel/u-boot.git]
/
include
/
configs
/
ls2080a_simu.h
diff --git
a/include/configs/ls2080a_simu.h
b/include/configs/ls2080a_simu.h
index
7f245b5
..
ab46df7
100644
(file)
--- a/
include/configs/ls2080a_simu.h
+++ b/
include/configs/ls2080a_simu.h
@@
-1,7
+1,6
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Freescale Semiconductor
/*
* Copyright (C) 2014 Freescale Semiconductor
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __LS2_SIMU_H
*/
#ifndef __LS2_SIMU_H
@@
-9,14
+8,9
@@
#include "ls2080a_common.h"
#include "ls2080a_common.h"
-#define CONFIG_IDENT_STRING " LS2080A-SIMU"
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
-#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
-
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
@@
-30,10
+24,7
@@
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
-#ifndef CONFIG_SYS_NO_FLASH
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_FLASH_QUIET_TEST
#endif
#define CONFIG_SYS_FLASH_QUIET_TEST
#endif
@@
-62,7
+53,7
@@
#define CONFIG_SYS_NOR_FTIM3 0x04000000
#define CONFIG_SYS_IFC_CCR 0x01000000
#define CONFIG_SYS_NOR_FTIM3 0x04000000
#define CONFIG_SYS_IFC_CCR 0x01000000
-#if
ndef CONFIG_SYS_NO
_FLASH
+#if
def CONFIG_MTD_NOR
_FLASH
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
@@
-112,7
+103,6
@@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@
-135,12
+125,8
@@
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
/* MMC */
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
/* MMC */
-#define CONFIG_MMC
#ifdef CONFIG_MMC
#ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
#endif
/* Debug Server firmware */
#endif
/* Debug Server firmware */
@@
-148,9
+134,6
@@
#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL
/* MC firmware */
#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL
/* MC firmware */
-#define CONFIG_SYS_LS_MC_FW_IN_NOR
-#define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL
-
#define CONFIG_SYS_LS_MC_DPL_IN_NOR
#define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL
#define CONFIG_SYS_LS_MC_DPL_IN_NOR
#define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL
@@
-160,7
+143,5
@@
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 200000
/* Store environment at top of flash */
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 200000
/* Store environment at top of flash */
-#define CONFIG_ENV_IS_NOWHERE 1
-#define CONFIG_ENV_SIZE 0x1000
#endif /* __LS2_SIMU_H */
#endif /* __LS2_SIMU_H */