projects
/
platform
/
kernel
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
configs: Finish migration of PHY_GIGE
[platform/kernel/u-boot.git]
/
include
/
configs
/
ls1043ardb.h
diff --git
a/include/configs/ls1043ardb.h
b/include/configs/ls1043ardb.h
index
5e570cd
..
a4162a6
100644
(file)
--- a/
include/configs/ls1043ardb.h
+++ b/
include/configs/ls1043ardb.h
@@
-129,7
+129,6
@@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@
-233,33
+232,31
@@
#endif
#if defined(CONFIG_NAND_BOOT)
#endif
#if defined(CONFIG_NAND_BOOT)
-#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (
10
* CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET (
24
* CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET (1024 * 1024)
-#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#else
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#else
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
/* FMan */
#ifndef SPL_NO_FMAN
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
/* FMan */
#ifndef SPL_NO_FMAN
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
+#define AQR105_IRQ_MASK 0x40000000
+#ifdef CONFIG_NET
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
+#endif
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_AQUANTIA
#define CONFIG_PHY_AQUANTIA
-#define AQR105_IRQ_MASK 0x40000000
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
@@
-277,11
+274,9
@@
/* QE */
#ifndef SPL_NO_QE
/* QE */
#ifndef SPL_NO_QE
-#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
- !defined(CONFIG_QSPI_BOOT)
+#if !defined(CONFIG_NAND_BOOT) && !defined(CONFIG_QSPI_BOOT)
#define CONFIG_U_QE
#endif
#define CONFIG_U_QE
#endif
-#define CONFIG_SYS_QE_FW_ADDR 0x60600000
#endif
/* USB */
#endif
/* USB */
@@
-290,7
+285,6
@@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#endif
#endif
#endif
@@
-299,9
+293,6
@@
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_CMD_SCSI
-#ifndef CONFIG_CMD_FAT
-#define CONFIG_CMD_FAT
-#endif
#ifndef CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT2
#endif
#ifndef CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT2
#endif