-#define CONFIG_NET_MULTI
-#define CONFIG_SH_ETHER
-#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_BITBANGMII
-#define CONFIG_BITBANGMII_MULTI
-
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_RCAR
-#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
-#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
+#define CFG_SH_ETHER_USE_PORT 0
+#define CFG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_ALIGNE_SIZE 64