-#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kiB for Monitor */
-#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kiB for malloc() */
-
-#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CFG_FLASH0_SIZE 0x01000000
-#define CFG_FLASH0_ADDR (-CFG_FLASH0_SIZE)
-#define CFG_FLASH1_TOP 0xF8000000
-#define CFG_FLASH1_MAX_SIZE 0x08000000
-#define CFG_FLASH1_ADDR (CFG_FLASH1_TOP - CFG_FLASH1_MAX_SIZE)
-#define CFG_FLASH_BASE CFG_FLASH1_ADDR /* start of FLASH */
-#define CFG_MONITOR_BASE TEXT_BASE
-#define CFG_OCM_BASE 0xe0010000 /* ocm */
-#define CFG_OCM_DATA_ADDR CFG_OCM_BASE
-#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
-#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kiB for Monitor */
+#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kiB for malloc() */
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CONFIG_SYS_FLASH0_SIZE 0x01000000
+#define CONFIG_SYS_FLASH0_ADDR (-CONFIG_SYS_FLASH0_SIZE)
+#define CONFIG_SYS_FLASH1_TOP 0xF8000000
+#define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000
+#define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE)
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR /* start of FLASH */
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
+#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
+#define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */
+#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */