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global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
[platform/kernel/u-boot.git]
/
include
/
configs
/
imx8mm-cl-iot-gate.h
diff --git
a/include/configs/imx8mm-cl-iot-gate.h
b/include/configs/imx8mm-cl-iot-gate.h
index
3b07e92
..
917d567
100644
(file)
--- a/
include/configs/imx8mm-cl-iot-gate.h
+++ b/
include/configs/imx8mm-cl-iot-gate.h
@@
-11,23
+11,13
@@
#include <asm/arch/imx-regs.h>
#include <config_distro_bootcmd.h>
#include <asm/arch/imx-regs.h>
#include <config_distro_bootcmd.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
-#define CONFIG_SPL_MAX_SIZE (148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN SZ_512K
#define CONFIG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK 0x920000
-#define CONFIG_SPL_BSS_START_ADDR 0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
-
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR 0x912000
/* For RAW image gives a error info not panic */
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR 0x912000
/* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#endif
#endif
@@
-135,30
+125,20
@@
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
-
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
/* USDHC */
/* USDHC */
-#define C
ONFIG_SYS_FSL_USDHC_NUM
2
-#define C
ONFIG_SYS_FSL_ESDHC_ADDR
0
+#define C
FG_SYS_FSL_USDHC_NUM
2
+#define C
FG_SYS_FSL_ESDHC_ADDR
0
#define CONFIG_FEC_MXC_PHYADDR 0
/* USB Configs */
#define CONFIG_FEC_MXC_PHYADDR 0
/* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif /*__IMX8MM_CL_IOT_GATE_H*/
#endif /*__IMX8MM_CL_IOT_GATE_H*/