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Merge branch 'next'
[platform/kernel/u-boot.git]
/
include
/
configs
/
gw8260.h
diff --git
a/include/configs/gw8260.h
b/include/configs/gw8260.h
index
53a001d
..
18d6c65
100644
(file)
--- a/
include/configs/gw8260.h
+++ b/
include/configs/gw8260.h
@@
-50,6
+50,8
@@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/* Enable debug prints */
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
/* Enable debug prints */
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
@@
-83,7
+85,7
@@
#define CONFIG_SYS_SBC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
#define CONFIG_SYS_SBC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain
TEXT_BASE from board/sbc8260/config.mk
+ * it (in MBytes)? This must contain
CONFIG_SYS_TEXT_BASE.
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
@@
-212,6
+214,11
@@
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
@@
-233,8
+240,8
@@
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
-# define CONFIG_SYS_CMXFCR_MASK
(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-# define CONFIG_SYS_CMXFCR_VALUE
(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CONFIG_SYS_CMXFCR_MASK
2
(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CONFIG_SYS_CMXFCR_VALUE
2
(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
@@
-246,8
+253,8
@@
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
-# define CONFIG_SYS_CMXFCR_MASK
(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
-# define CONFIG_SYS_CMXFCR_VALUE
(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
+# define CONFIG_SYS_CMXFCR_MASK
3
(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
+# define CONFIG_SYS_CMXFCR_VALUE
3
(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
@@
-324,7
+331,6
@@
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
#ifdef CONFIG_SYS_HUSH_PARSER
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif
/* What is the address of IO controller */
#endif
/* What is the address of IO controller */
@@
-380,9
+386,6
@@
#define CONFIG_SYS_MEMTEST_END ( CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 \
- CONFIG_SYS_MEM_END_USAGE )
#define CONFIG_SYS_MEMTEST_END ( CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 \
- CONFIG_SYS_MEM_END_USAGE )
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
@@
-431,9
+434,8
@@
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
@@
-814,13
+816,4
@@
ORxG_SCY_11_CLK |\
ORxG_EHTR)
#endif /* CONFIG_SYS_IO_BASE */
ORxG_SCY_11_CLK |\
ORxG_EHTR)
#endif /* CONFIG_SYS_IO_BASE */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#endif /* __CONFIG_H */