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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx
[platform/kernel/u-boot.git]
/
include
/
configs
/
edminiv2.h
diff --git
a/include/configs/edminiv2.h
b/include/configs/edminiv2.h
index
2b7a5d7
..
dd16e3f
100644
(file)
--- a/
include/configs/edminiv2.h
+++ b/
include/configs/edminiv2.h
@@
-1,3
+1,4
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
@@
-5,8
+6,6
@@
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CONFIG_EDMINIV2_H
*/
#ifndef _CONFIG_EDMINIV2_H
@@
-16,8
+15,6
@@
* SPL
*/
* SPL
*/
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0xffff0000
#define CONFIG_SPL_MAX_SIZE 0x0000fff0
#define CONFIG_SPL_STACK 0x00020000
#define CONFIG_SPL_BSS_START_ADDR 0x00020000
#define CONFIG_SPL_MAX_SIZE 0x0000fff0
#define CONFIG_SPL_STACK 0x00020000
#define CONFIG_SPL_BSS_START_ADDR 0x00020000
@@
-26,16
+23,13
@@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
-#define CONFIG_SYS_TEXT_BASE 0x00800000
/*
* High Level Configuration Options (easy to change)
*/
/*
* High Level Configuration Options (easy to change)
*/
-#define CONFIG_MARVELL 1
#define CONFIG_FEROCEON 1 /* CPU Core subversion */
#define CONFIG_88F5182 1 /* SOC Name */
#define CONFIG_FEROCEON 1 /* CPU Core subversion */
#define CONFIG_88F5182 1 /* SOC Name */
-#define CONFIG_MACH_EDMINIV2 1 /* Machine type */
#include <asm/arch/orion5x.h>
/*
#include <asm/arch/orion5x.h>
/*
@@
-87,7
+81,6
@@
* for your console driver.
*/
* for your console driver.
*/
-#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
@@
-95,8
+88,6
@@
* FLASH configuration
*/
* FLASH configuration
*/
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
#define CONFIG_SYS_FLASH_BASE 0xfff80000
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
#define CONFIG_SYS_FLASH_BASE 0xfff80000
@@
-113,24
+104,17
@@
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
-/*
- * Commands configuration
- */
/*
* Network
*/
#ifdef CONFIG_CMD_NET
/*
* Network
*/
#ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE /* Enable Marvell GbE Driver */
#define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
#define CONFIG_PHY_BASE_ADR 0x8
#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
#define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
#define CONFIG_PHY_BASE_ADR 0x8
#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
-#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_MII /* expose smi ove miiphy interface */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
-#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#endif
/*
#endif
/*
@@
-166,7
+150,6
@@
*/
#ifdef CONFIG_CMD_USB
#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
*/
#ifdef CONFIG_CMD_USB
#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
-#define CONFIG_SUPPORT_VFAT
#endif /* CONFIG_CMD_USB */
/*
#endif /* CONFIG_CMD_USB */
/*
@@
-183,9
+166,6
@@
/*
* Environment variables configurations
*/
/*
* Environment variables configurations
*/
-#define CONFIG_ENV_SECT_SIZE 0x2000 /* 16K */
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET 0x4000 /* env starts here */
/*
* Size of malloc() pool
/*
* Size of malloc() pool
@@
-195,19
+175,13
@@
/*
* Other required minimal configurations
*/
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
-#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_LOAD_ADDR 0x00800000
#define CONFIG_SYS_LOAD_ADDR 0x00800000
-#define CONFIG_SYS_MEMTEST_START 0x00400000
-#define CONFIG_SYS_MEMTEST_END 0x007fffff
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
/* Enable command line editing */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
/* Enable command line editing */
-#define CONFIG_CMDLINE_EDITING
/* provide extensive help */
/* provide extensive help */
-#define CONFIG_SYS_LONGHELP
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0