-#define CFG_NAND_BASE 0x02000000
-#define CFG_NAND_HW_ECC
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
-#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
-/*=====================*/
-/* Board related stuff */
-/*=====================*/
-/*==========================================*/
-/* I2C switch definitions for PCA9543 chip */
-/* on Lyrtech SFF SDR board. */
-/* This chip has a single register. */
-/*==========================================*/
-#define CFG_I2C_PCA9543_ADDR 0x70
-#define CFG_I2C_PCA9543_ADDR_LEN 0
-#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */
-/*==============================*/
+#define CONFIG_SYS_NAND_BASE 0x02000000
+#define CONFIG_SYS_NAND_HW_ECC
+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+/* I2C switch definitions for PCA9543 chip */
+#define CONFIG_SYS_I2C_PCA9543_ADDR 0x70
+#define CONFIG_SYS_I2C_PCA9543_ADDR_LEN 0 /* Single register. */
+#define CONFIG_SYS_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */