/*
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
#define CONFIG_SYS_TEXT_BASE 0x0
/*
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
#define CONFIG_SYS_TEXT_BASE 0x0
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_LZMA /* LZMA compression support */
#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_LZMA /* LZMA compression support */
-#define CONFIG_CMD_FLASH
+
+/* I2C support */
+#ifdef CONFIG_SYS_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_PXA
+#define CONFIG_PXA_STD_I2C
+#define CONFIG_PXA_PWR_I2C
+#define CONFIG_SYS_I2C_SPEED 100000
+#endif
+
+/* LCD support */
+#ifdef CONFIG_LCD
+#define CONFIG_PXA_LCD
+#define CONFIG_PXA_VGA
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES 10
+#define CONFIG_CMD_BMP
+#define CONFIG_LCD_LOGO
+#endif
-/*
- * HUSH Shell Configuration
- */
-#define CONFIG_SYS_HUSH_PARSER 1
-
-#define CONFIG_SYS_LONGHELP
-#ifdef CONFIG_SYS_HUSH_PARSER
+#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
+#undef CONFIG_SYS_PROMPT
+#ifdef CONFIG_HUSH_PARSER
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_GPDR0_VAL 0x08000000
-#define CONFIG_SYS_GPDR1_VAL 0x0002A981
-#define CONFIG_SYS_GPDR2_VAL 0x0202FC00
-#define CONFIG_SYS_GPDR3_VAL 0x00000000
+#define CONFIG_SYS_GPDR0_VAL 0xc8008000
+#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
+#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
+#define CONFIG_SYS_GPDR3_VAL 0x0061e804
-#define CONFIG_SYS_GAFR0_L_VAL 0x00100000
-#define CONFIG_SYS_GAFR0_U_VAL 0x00C00010
-#define CONFIG_SYS_GAFR1_L_VAL 0x999A901A
-#define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008
-#define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA
-#define CONFIG_SYS_GAFR2_U_VAL 0x0109A000
-#define CONFIG_SYS_GAFR3_L_VAL 0x54000300
-#define CONFIG_SYS_GAFR3_U_VAL 0x00024001
+#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
+#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
+#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
+#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
+#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
+#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
+#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
+#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
-#define CONFIG_SYS_MSC0_VAL 0x000095f2
-#define CONFIG_SYS_MSC1_VAL 0x00007ff4
-#define CONFIG_SYS_MSC2_VAL 0x00000000
-#define CONFIG_SYS_MDCNFG_VAL 0x08000ac9
-#define CONFIG_SYS_MDREFR_VAL 0x2013e01e
-#define CONFIG_SYS_MDMRS_VAL 0x00320032
-#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
+#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
+#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
+#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
+#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
+#define CONFIG_SYS_MDREFR_VAL 0x2003a031
+#define CONFIG_SYS_MDMRS_VAL 0x00220022
+#define CONFIG_SYS_FLYCNFG_VAL 0x00010001