-#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_V | BR_BI | BR_PS_16)
-#define CFG_OR0_PRELIM (OR_ADDR_MK_FF | OR_SCY_3)
-#define CFG_BR1_PRELIM (ANYBUS_BASE)
-#define CFG_OR1_PRELIM (OR_ADDR_MK_FFFF | OR_SCY_1 | OR_ETHR)
-#define CFG_BR2_PRELIM (CFG_SDRAM_BASE | BR_V | BR_PS_32)
-#define CFG_OR2_PRELIM (OR_ADDR_MK_FF)
-#define CFG_BR3_PRELIM (PLD_BASE | BR_V | BR_BI | BR_LBDIR | BR_PS_8)
-#define CFG_OR3_PRELIM (OR_ADDR_MK_FF | OR_TRLX | OR_BSCY | OR_SCY_8 | \
- OR_ACS_10 | OR_ETHR | OR_CSNT)
+#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_V | BR_BI | BR_PS_16)
+#define CONFIG_SYS_OR0_PRELIM (OR_ADDR_MK_FF | OR_SCY_3)
+#define CONFIG_SYS_BR1_PRELIM (ANYBUS_BASE)
+#define CONFIG_SYS_OR1_PRELIM (OR_ADDR_MK_FFFF | OR_SCY_1 | OR_ETHR)
+#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_SDRAM_BASE | BR_V | BR_PS_32)
+#define CONFIG_SYS_OR2_PRELIM (OR_ADDR_MK_FF)
+#define CONFIG_SYS_BR3_PRELIM (PLD_BASE | BR_V | BR_BI | BR_LBDIR | BR_PS_8)
+#define CONFIG_SYS_OR3_PRELIM (OR_ADDR_MK_FF | OR_TRLX | OR_BSCY | OR_SCY_8 | \
+ OR_ACS_10 | OR_ETHR | OR_CSNT)