/* MEMORY */
#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
/* MEMORY */
#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
#define SCIF0_BASE 0xe6c40000
#define SCIF1_BASE 0xe6c50000
#define SCIF2_BASE 0xe6c60000
#define SCIF0_BASE 0xe6c40000
#define SCIF1_BASE 0xe6c50000
#define SCIF2_BASE 0xe6c60000
#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
#define CONFIG_SH_ETHER_SH7734_MII (0x01)
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
#define CONFIG_SH_ETHER_SH7734_MII (0x01)
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII