* Copyright (C) 2012 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
* Copyright (C) 2012 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_SPI_FLASH_MTD
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* DMA stuff, needed for GPMI/MXS NAND support */