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Convert CONFIG_CMD_SATA to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
T4240RDB.h
diff --git
a/include/configs/T4240RDB.h
b/include/configs/T4240RDB.h
index
5b3c6fa
..
ed3b0f7
100644
(file)
--- a/
include/configs/T4240RDB.h
+++ b/
include/configs/T4240RDB.h
@@
-49,7
+49,6
@@
#define CONFIG_SPL_SKIP_RELOCATE
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#define CONFIG_SPL_SKIP_RELOCATE
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#define CONFIG_SYS_NO_FLASH
#endif
#endif
#endif
#endif
@@
-60,9
+59,6
@@
#define CONFIG_CMD_REGINFO
/* High Level Configuration Options */
#define CONFIG_CMD_REGINFO
/* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500 /* BOOKE e500 family */
-#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
@@
-75,9
+71,7
@@
#endif
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#endif
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
+#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
@@
-130,13
+124,11
@@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
#define CONFIG_DDR_SPD
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
#define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
/*
* IFC Definitions
/*
* IFC Definitions
@@
-246,7
+238,6
@@
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
#endif /* CONFIG_PCI */
/* SATA */
#endif /* CONFIG_PCI */
/* SATA */
@@
-263,8
+254,6
@@
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
-#define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
#endif
#ifdef CONFIG_FMAN_ENET
#endif
#ifdef CONFIG_FMAN_ENET
@@
-282,8
+271,6
@@
/*
* Command line configuration.
*/
/*
* Command line configuration.
*/
-#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_IRQ
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
@@
-327,13
+314,11
@@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
#define CONFIG_HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
-#if
def CONFIG_SYS_NO
_FLASH
+#if
ndef CONFIG_MTD_NOR
_FLASH
#ifndef CONFIG_RAMBOOT_PBL
#define CONFIG_ENV_IS_NOWHERE
#endif
#ifndef CONFIG_RAMBOOT_PBL
#define CONFIG_ENV_IS_NOWHERE
#endif
@@
-685,8
+670,6
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
-#define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
#endif
#ifdef CONFIG_FMAN_ENET
#endif
#ifdef CONFIG_FMAN_ENET
@@
-698,7
+681,6
@@
unsigned long get_board_ddr_clk(void);
/*
* USB
*/
/*
* USB
*/
-#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
@@
-707,17
+689,9
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
-/* Hash command with SHA acceleration supported in hardware */
-#ifdef CONFIG_FSL_CAAM
-#define CONFIG_CMD_HASH
-#define CONFIG_SHA_HW_ACCEL
-#endif
-
#define __USB_PHY_TYPE utmi
#define __USB_PHY_TYPE utmi