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treewide: Migrate CONFIG_FSL_ESDHC to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
T102xRDB.h
diff --git
a/include/configs/T102xRDB.h
b/include/configs/T102xRDB.h
index
5363fe6
..
e2dcca7
100644
(file)
--- a/
include/configs/T102xRDB.h
+++ b/
include/configs/T102xRDB.h
@@
-81,7
+81,6
@@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
-#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
@@
-213,7
+212,6
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00400000
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00400000
-#define CONFIG_SYS_ALT_MEMTEST
/*
* Config the L3 Cache as L3 SRAM
/*
* Config the L3 Cache as L3 SRAM
@@
-433,7
+431,6
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_HWCONFIG
#define CONFIG_MISC_INIT_R
#define CONFIG_HWCONFIG
@@
-464,7
+461,6
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Serial Port */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
@@
-637,7
+633,6
@@
unsigned long get_board_ddr_clk(void);
* SDHC
*/
#ifdef CONFIG_MMC
* SDHC
*/
#ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif
@@
-768,9
+763,6
@@
unsigned long get_board_ddr_clk(void);
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*