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MX31: QONG: drop config.mk
[platform/kernel/u-boot.git]
/
include
/
configs
/
MPC8360ERDK.h
diff --git
a/include/configs/MPC8360ERDK.h
b/include/configs/MPC8360ERDK.h
index
a4f2862
..
a4f42cf
100644
(file)
--- a/
include/configs/MPC8360ERDK.h
+++ b/
include/configs/MPC8360ERDK.h
@@
-22,22
+22,24
@@
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83
XX 1 /* MPC83XX
family */
+#define CONFIG_MPC83
xx 1 /* MPC83xx
family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+
/*
* System Clock Setup
*/
#ifdef CONFIG_CLKIN_33MHZ
#define CONFIG_83XX_CLKIN 33333333
#define CONFIG_SYS_CLK_FREQ 33333333
/*
* System Clock Setup
*/
#ifdef CONFIG_CLKIN_33MHZ
#define CONFIG_83XX_CLKIN 33333333
#define CONFIG_SYS_CLK_FREQ 33333333
-#define
PCI_33M
1
+#define
CONFIG_PCI_33M
1
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_10X1
#else
#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_10X1
#else
#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
-#define
PCI_66M
1
+#define
CONFIG_PCI_66M
1
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_5X1
#endif /* CONFIG_CLKIN_33MHZ */
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_5X1
#endif /* CONFIG_CLKIN_33MHZ */
@@
-153,7
+155,7
@@
/*
* The reserved memory
*/
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE
CONFIG_SYS_
TEXT_BASE /* start of monitor */
#define CONFIG_SYS_FLASH_BASE 0xFF800000 /* FLASH base address */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_FLASH_BASE 0xFF800000 /* FLASH base address */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
@@
-162,7
+164,7
@@
#undef CONFIG_SYS_RAMBOOT
#endif
#undef CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_SYS_MONITOR_LEN (
256 * 1024) /* Reserve 256
kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (
384 * 1024) /* Reserve 384
kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/*
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/*
@@
-170,14
+172,14
@@
*/
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
*/
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*
* Local Bus Configuration & Clock Setup
*/
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
@@
-211,7
+213,6
@@
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_UPM 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_UPM 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
@@
-237,7
+238,6
@@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
@@
-250,6
+250,7
@@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
#ifdef CONFIG_SYS_HUSH_PARSER
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
#ifdef CONFIG_SYS_HUSH_PARSER
@@
-266,7
+267,6
@@
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {{0x52}} /* Don't probe these addrs */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {{0x52}} /* Don't probe these addrs */
@@
-278,7
+278,6
@@
* Addresses are mapped 1-1.
*/
#define CONFIG_PCI
* Addresses are mapped 1-1.
*/
#define CONFIG_PCI
-#define CONFIG_83XX_GENERIC_PCI 1
#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
@@
-310,7
+309,7
@@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "
FSL
UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* GETH1 */
#define CONFIG_UEC_ETH1 /* GETH1 */
@@
-320,7
+319,8
@@
#define CONFIG_SYS_UEC1_TX_CLK QE_CLK9
#define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
#define CONFIG_SYS_UEC1_PHY_ADDR 2
#define CONFIG_SYS_UEC1_TX_CLK QE_CLK9
#define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
#define CONFIG_SYS_UEC1_PHY_ADDR 2
-#define CONFIG_SYS_UEC1_INTERFACE_MODE ENET_1000_RGMII_RXID
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_RXID
+#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
#endif
#define CONFIG_UEC_ETH2 /* GETH2 */
#endif
#define CONFIG_UEC_ETH2 /* GETH2 */
@@
-331,7
+331,8
@@
#define CONFIG_SYS_UEC2_TX_CLK QE_CLK4
#define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
#define CONFIG_SYS_UEC2_PHY_ADDR 4
#define CONFIG_SYS_UEC2_TX_CLK QE_CLK4
#define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
#define CONFIG_SYS_UEC2_PHY_ADDR 4
-#define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_1000_RGMII_RXID
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_RXID
+#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
#endif
/*
#endif
/*
@@
-340,7
+341,7
@@
#ifndef CONFIG_SYS_RAMBOOT
#define CONFIG_ENV_IS_IN_FLASH 1
#ifndef CONFIG_SYS_RAMBOOT
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE +
0x40000
)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE +
CONFIG_SYS_MONITOR_LEN
)
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
#define CONFIG_ENV_SIZE 0x20000
#else /* CONFIG_SYS_RAMBOOT */
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
#define CONFIG_ENV_SIZE 0x20000
#else /* CONFIG_SYS_RAMBOOT */
@@
-377,7
+378,7
@@
#endif
#if defined(CONFIG_SYS_RAMBOOT)
#endif
#if defined(CONFIG_SYS_RAMBOOT)
-#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_
SAVE
ENV
#undef CONFIG_CMD_LOADS
#endif
#undef CONFIG_CMD_LOADS
#endif
@@
-403,16
+404,17
@@
/*
* For booting Linux, the board info and command line data
/*
* For booting Linux, the board info and command line data
- * have to be in the first
8
MB of memory, since this is
+ * have to be in the first
256
MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CONFIG_SYS_BOOTMAPSZ (
8
<< 20) /* Initial Memory map for Linux */
+#define CONFIG_SYS_BOOTMAPSZ (
256
<< 20) /* Initial Memory map for Linux */
/*
* Core HID Setup
*/
/*
* Core HID Setup
*/
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+#define CONFIG_SYS_HID0_INIT 0x000000000
+#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
+ HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
/*
#define CONFIG_SYS_HID2 HID2_HBE
/*
@@
-483,14
+485,6
@@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* CONFIG_PCI */
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* CONFIG_PCI */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
@@
-506,10
+500,6
@@
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
#define CONFIG_HAS_ETH3
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
#define CONFIG_HAS_ETH3
-#define CONFIG_ETHADDR 00:04:9f:ef:01:01
-#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02
-#define CONFIG_ETH2ADDR 00:04:9f:ef:01:03
-#define CONFIG_ETH3ADDR 00:04:9f:ef:01:04
#endif
#define CONFIG_BAUDRATE 115200
#endif
#define CONFIG_BAUDRATE 115200
@@
-518,10
+508,6
@@
#define CONFIG_HOSTNAME mpc8360erdk
#define CONFIG_BOOTFILE uImage
#define CONFIG_HOSTNAME mpc8360erdk
#define CONFIG_BOOTFILE uImage
-#define CONFIG_IPADDR 10.0.0.99
-#define CONFIG_SERVERIP 10.0.0.2
-#define CONFIG_GATEWAYIP 10.0.0.2
-#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_ROOTPATH /nfsroot/
#define CONFIG_BOOTDELAY 2 /* -1 disables auto-boot */
#define CONFIG_ROOTPATH /nfsroot/
#define CONFIG_BOOTDELAY 2 /* -1 disables auto-boot */
@@
-532,7
+518,7
@@
"consoledev=ttyS0\0"\
"loadaddr=a00000\0"\
"fdtaddr=900000\0"\
"consoledev=ttyS0\0"\
"loadaddr=a00000\0"\
"fdtaddr=900000\0"\
- "fdtfile=dtb\0"\
+ "fdtfile=
mpc836x_rdk.
dtb\0"\
"fsfile=fs\0"\
"ubootfile=u-boot.bin\0"\
"mtdparts=mtdparts=60000000.nand-flash:4096k(kernel),128k(dtb),-(rootfs)\0"\
"fsfile=fs\0"\
"ubootfile=u-boot.bin\0"\
"mtdparts=mtdparts=60000000.nand-flash:4096k(kernel),128k(dtb),-(rootfs)\0"\