projects
/
platform
/
kernel
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
powerpc/p4080ds: Move ICS refclk define into P4080DS.h
[platform/kernel/u-boot.git]
/
include
/
configs
/
MPC8313ERDB.h
diff --git
a/include/configs/MPC8313ERDB.h
b/include/configs/MPC8313ERDB.h
index
0ef4eba
..
1201133
100644
(file)
--- a/
include/configs/MPC8313ERDB.h
+++ b/
include/configs/MPC8313ERDB.h
@@
-1,5
+1,5
@@
/*
/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006.
+ * Copyright (C) Freescale Semiconductor, Inc. 2006
, 2010
.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* See file CREDITS for list of people who contributed to this
* project.
@@
-30,13
+30,17
@@
* High Level Configuration Options
*/
#define CONFIG_E300 1
* High Level Configuration Options
*/
#define CONFIG_E300 1
-#define CONFIG_MPC83
XX
1
-#define CONFIG_MPC831
X
1
+#define CONFIG_MPC83
xx
1
+#define CONFIG_MPC831
x
1
#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1
#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+#endif
+
#define CONFIG_PCI
#define CONFIG_PCI
-#define CONFIG_
83XX_GENERIC_PCI
+#define CONFIG_
FSL_ELBC 1
#define CONFIG_MISC_INIT_R
#define CONFIG_MISC_INIT_R
@@
-196,7
+200,7
@@
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE
TEXT_BASE
/* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE
CONFIG_SYS_TEXT_BASE
/* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT
@@
-204,20
+208,20
@@
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_
END 0x1000 /* End
of used area in RAM*/
+#define CONFIG_SYS_INIT_RAM_
SIZE 0x1000 /* Size
of used area in RAM*/
-#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
-#define CONFIG_SYS_MONITOR_LEN (
256 * 1024) /* Reserve 256
kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (
384 * 1024) /* Reserve 384
kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/*
* Local Bus LCRR and LBCR regs
*/
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/*
* Local Bus LCRR and LBCR regs
*/
-#define CONFIG_SYS_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4
+#define CONFIG_SYS_LCRR_EADC LCRR_EADC_1
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR ( 0x00040000 /* TODO */ \
| (0xFF << LBCR_BMT_SHIFT) \
| 0xF ) /* 0x0004ff0f */
#define CONFIG_SYS_LBC_LBCR ( 0x00040000 /* TODO */ \
| (0xFF << LBCR_BMT_SHIFT) \
| 0xF ) /* 0x0004ff0f */
@@
-231,6
+235,13
@@
#define CONFIG_SYS_NAND_BASE 0xE2800000
#endif
#define CONFIG_SYS_NAND_BASE 0xE2800000
#endif
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITION
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT "nand0=e2800000.flash"
+#define MTDPARTS_DEFAULT \
+ "mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
+
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND 1
@@
-242,6
+253,7
@@
#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384
#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384
#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
#define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
#define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
@@
-321,7
+333,6
@@
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
@@
-435,7
+446,7
@@
#endif
#define CONFIG_CMDLINE_EDITING 1
#endif
#define CONFIG_CMDLINE_EDITING 1
-
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
/*
* Miscellaneous configurable options
/*
* Miscellaneous configurable options
@@
-452,10
+463,10
@@
/*
* For booting Linux, the board info and command line data
/*
* For booting Linux, the board info and command line data
- * have to be in the first
8
MB of memory, since this is
+ * have to be in the first
256
MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CONFIG_SYS_BOOTMAPSZ (
8 << 20)
/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ (
256 << 20)
/* Initial Memory map for Linux*/
#define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */
#define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */
@@
-513,11
+524,12
@@
/* System IO Config */
#define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
/* System IO Config */
#define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
-#define CONFIG_SYS_SICRL SICRL_USBDR
/* Enable Internal USB Phy */
+#define CONFIG_SYS_SICRL SICRL_USBDR
_10
/* Enable Internal USB Phy */
#define CONFIG_SYS_HID0_INIT 0x000000000
#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
#define CONFIG_SYS_HID0_INIT 0x000000000
#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
+ HID0_ENABLE_INSTRUCTION_CACHE | \
+ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
#define CONFIG_SYS_HID2 HID2_HBE
#define CONFIG_SYS_HID2 HID2_HBE
@@
-544,7
+556,7
@@
#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10)
+#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10
| BATL_GUARDEDSTORAGE
)
#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT7L (0)
#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT7L (0)
@@
-568,25
+580,10
@@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-/*
* Environment Configuration
*/
#define CONFIG_ENV_OVERWRITE
* Environment Configuration
*/
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ETHADDR 00:E0:0C:00:95:01
-#define CONFIG_ETH1ADDR 00:E0:0C:00:95:02
-
-#define CONFIG_IPADDR 10.0.0.2
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_NETDEV eth1
#define CONFIG_HOSTNAME mpc8313erdb
#define CONFIG_NETDEV eth1
#define CONFIG_HOSTNAME mpc8313erdb
@@
-595,7
+592,7
@@
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_FDTFILE mpc8313erdb.dtb
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_FDTFILE mpc8313erdb.dtb
-#define CONFIG_LOADADDR
5
00000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR
8
00000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#define CONFIG_BAUDRATE 115200
@@
-607,12
+604,12
@@
"ethprime=TSEC1\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
"ethprime=TSEC1\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(
TEXT_BASE) " +$filesize; "
\
- "erase " MK_STR(
TEXT_BASE) " +$filesize; "
\
- "cp.b $loadaddr " MK_STR(
TEXT_BASE) " $filesize; "
\
- "protect on " MK_STR(
TEXT_BASE) " +$filesize; "
\
- "cmp.b $loadaddr " MK_STR(
TEXT_BASE) " $filesize\0"
\
- "fdtaddr=
40
0000\0" \
+ "protect off " MK_STR(
CONFIG_SYS_TEXT_BASE) " +$filesize; "
\
+ "erase " MK_STR(
CONFIG_SYS_TEXT_BASE) " +$filesize; "
\
+ "cp.b $loadaddr " MK_STR(
CONFIG_SYS_TEXT_BASE) " $filesize; "
\
+ "protect on " MK_STR(
CONFIG_SYS_TEXT_BASE) " +$filesize; "
\
+ "cmp.b $loadaddr " MK_STR(
CONFIG_SYS_TEXT_BASE) " $filesize\0"
\
+ "fdtaddr=
78
0000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"console=ttyS0\0" \
"setbootargs=setenv bootargs " \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"console=ttyS0\0" \
"setbootargs=setenv bootargs " \