-#define DEFAULT_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_FLASH | \
- CFG_CMD_I2C | \
- (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO \
- )
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
#define CFG_INIT_RAM_CTRL 0x221
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
#define CFG_INIT_RAM_CTRL 0x221
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
#define CFG_SDRAM_CFG1 0x53722730
#define CFG_SDRAM_CFG2 0x56670000
#define CFG_SDRAM_CTRL 0xE1092000
#define CFG_SDRAM_CFG1 0x53722730
#define CFG_SDRAM_CFG2 0x56670000
#define CFG_SDRAM_CTRL 0xE1092000
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-# define CFG_MAX_NAND_DEVICE 1
-# define CFG_NAND_BASE (CFG_CS2_BASE << 16)
-# define CFG_NAND_SIZE 1
-# define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
-# define NAND_MAX_CHIPS 1
-# define NAND_ALLOW_ERASE_ALL 1
-# define CONFIG_JFFS2_NAND 1
-# define CONFIG_JFFS2_DEV "nand0"
-# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1)
-# define CONFIG_JFFS2_PART_OFFSET 0x00000000
+# define CFG_MAX_NAND_DEVICE 1
+# define CFG_NAND_BASE (CFG_CS2_BASE << 16)
+# define CFG_NAND_SIZE 1
+# define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+# define NAND_MAX_CHIPS 1
+# define NAND_ALLOW_ERASE_ALL 1
+# define CONFIG_JFFS2_NAND 1
+# define CONFIG_JFFS2_DEV "nand0"
+# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1)
+# define CONFIG_JFFS2_PART_OFFSET 0x00000000
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash