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i2c: Move PPC4xx I2C driver into drivers/i2c directory
[platform/kernel/u-boot.git]
/
include
/
configs
/
CANBT.h
diff --git
a/include/configs/CANBT.h
b/include/configs/CANBT.h
index
ae32f6b
..
cdba81d
100644
(file)
--- a/
include/configs/CANBT.h
+++ b/
include/configs/CANBT.h
@@
-50,7
+50,7
@@
"bootm ffe00000 ffe80000"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
"bootm ffe00000 ffe80000"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define C
FG_LOADS_BAUD_CHANGE
1 /* allow baudrate change */
+#define C
ONFIG_SYS_LOADS_BAUD_CHANGE
1 /* allow baudrate change */
#undef CONFIG_PCI_PNP /* no pci plug-and-play */
#undef CONFIG_PCI_PNP /* no pci plug-and-play */
@@
-84,88
+84,88
@@
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define C
FG_LONGHELP
/* undef to save memory */
-#define C
FG_PROMPT
"=> " /* Monitor Command Prompt */
+#define C
ONFIG_SYS_LONGHELP
/* undef to save memory */
+#define C
ONFIG_SYS_PROMPT
"=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#if defined(CONFIG_CMD_KGDB)
-#define C
FG_CBSIZE
1024 /* Console I/O Buffer Size */
+#define C
ONFIG_SYS_CBSIZE
1024 /* Console I/O Buffer Size */
#else
#else
-#define C
FG_CBSIZE
256 /* Console I/O Buffer Size */
+#define C
ONFIG_SYS_CBSIZE
256 /* Console I/O Buffer Size */
#endif
#endif
-#define C
FG_PBSIZE (CFG_CBSIZE+sizeof(CFG
_PROMPT)+16) /* Print Buffer Size */
-#define C
FG_MAXARGS
16 /* max number of command args */
-#define C
FG_BARGSIZE CFG_CBSIZE
/* Boot Argument Buffer Size */
+#define C
ONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS
_PROMPT)+16) /* Print Buffer Size */
+#define C
ONFIG_SYS_MAXARGS
16 /* max number of command args */
+#define C
ONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot Argument Buffer Size */
-#define C
FG_CONSOLE_INFO_QUIET
1 /* don't print console @ startup*/
+#define C
ONFIG_SYS_CONSOLE_INFO_QUIET
1 /* don't print console @ startup*/
-#define C
FG_MEMTEST_START
0x0400000 /* memtest works on */
-#define C
FG_MEMTEST_END
0x0C00000 /* 4 ... 12 MB in DRAM */
+#define C
ONFIG_SYS_MEMTEST_START
0x0400000 /* memtest works on */
+#define C
ONFIG_SYS_MEMTEST_END
0x0C00000 /* 4 ... 12 MB in DRAM */
-#define C
FG_EXT_SERIAL_CLOCK
14745600 /* use external serial clock */
+#define C
ONFIG_SYS_EXT_SERIAL_CLOCK
14745600 /* use external serial clock */
/* The following table includes the supported baudrates */
/* The following table includes the supported baudrates */
-#define C
FG_BAUDRATE_TABLE
\
+#define C
ONFIG_SYS_BAUDRATE_TABLE
\
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
57600, 115200, 230400, 460800, 921600 }
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
57600, 115200, 230400, 460800, 921600 }
-#define C
FG_LOAD_ADDR
0x100000 /* default load address */
-#define C
FG_EXTBDINFO
1 /* To use extended board_into (bd_t) */
+#define C
ONFIG_SYS_LOAD_ADDR
0x100000 /* default load address */
+#define C
ONFIG_SYS_EXTBDINFO
1 /* To use extended board_into (bd_t) */
-#define C
FG_HZ
1000 /* decrementer freq: 1 ms ticks */
+#define C
ONFIG_SYS_HZ
1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
- * Please note that C
FG
_SDRAM_BASE _must_ start at 0
+ * Please note that C
ONFIG_SYS
_SDRAM_BASE _must_ start at 0
*/
*/
-#define C
FG_SDRAM_BASE
0x00000000
-#define C
FG_FLASH_BASE
0xFFFE0000
-#define C
FG_MONITOR_BASE CFG
_FLASH_BASE
-#define C
FG_MONITOR_LEN
(128 * 1024) /* Reserve 128 kB for Monitor */
-#define C
FG_MALLOC_LEN
(128 * 1024) /* Reserve 128 kB for malloc() */
+#define C
ONFIG_SYS_SDRAM_BASE
0x00000000
+#define C
ONFIG_SYS_FLASH_BASE
0xFFFE0000
+#define C
ONFIG_SYS_MONITOR_BASE CONFIG_SYS
_FLASH_BASE
+#define C
ONFIG_SYS_MONITOR_LEN
(128 * 1024) /* Reserve 128 kB for Monitor */
+#define C
ONFIG_SYS_MALLOC_LEN
(128 * 1024) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define C
FG_BOOTMAPSZ
(8 << 20) /* Initial Memory map for Linux */
+#define C
ONFIG_SYS_BOOTMAPSZ
(8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define C
FG_MAX_FLASH_BANKS
1 /* max number of memory banks */
-#define C
FG_MAX_FLASH_SECT
256 /* max number of sectors on one chip */
+#define C
ONFIG_SYS_MAX_FLASH_BANKS
1 /* max number of memory banks */
+#define C
ONFIG_SYS_MAX_FLASH_SECT
256 /* max number of sectors on one chip */
-#define C
FG_FLASH_ERASE_TOUT
120000 /* Timeout for Flash Erase (in ms) */
-#define C
FG_FLASH_WRITE_TOUT
500 /* Timeout for Flash Write (in ms) */
+#define C
ONFIG_SYS_FLASH_ERASE_TOUT
120000 /* Timeout for Flash Erase (in ms) */
+#define C
ONFIG_SYS_FLASH_WRITE_TOUT
500 /* Timeout for Flash Write (in ms) */
-#define C
FG_FLASH_WORD_SIZE
unsigned short /* flash word size (width) */
-#define C
FG_FLASH_ADDR0
0x5555 /* 1st address for flash config cycles */
-#define C
FG_FLASH_ADDR1
0x2AAA /* 2nd address for flash config cycles */
+#define C
ONFIG_SYS_FLASH_WORD_SIZE
unsigned short /* flash word size (width) */
+#define C
ONFIG_SYS_FLASH_ADDR0
0x5555 /* 1st address for flash config cycles */
+#define C
ONFIG_SYS_FLASH_ADDR1
0x2AAA /* 2nd address for flash config cycles */
/*
* The following defines are added for buggy IOP480 byte interface.
* All other boards should use the standard values (CPCI405 etc.)
*/
/*
* The following defines are added for buggy IOP480 byte interface.
* All other boards should use the standard values (CPCI405 etc.)
*/
-#define C
FG_FLASH_READ0
0x0000 /* 0 is standard */
-#define C
FG_FLASH_READ1
0x0001 /* 1 is standard */
-#define C
FG_FLASH_READ2
0x0002 /* 2 is standard */
+#define C
ONFIG_SYS_FLASH_READ0
0x0000 /* 0 is standard */
+#define C
ONFIG_SYS_FLASH_READ1
0x0001 /* 1 is standard */
+#define C
ONFIG_SYS_FLASH_READ2
0x0002 /* 2 is standard */
-#define C
FG_FLASH_EMPTY_INFO
/* print 'E' for empty sector on flinfo */
+#define C
ONFIG_SYS_FLASH_EMPTY_INFO
/* print 'E' for empty sector on flinfo */
#if 0 /* Use FLASH for environment variables */
#if 0 /* Use FLASH for environment variables */
-#define C
FG_ENV_IS_IN_FLASH
1
-#define C
FG_ENV_OFFSET
0x00010000 /* Offset of Environment Sector */
-#define C
FG_ENV_SIZE
0x1000 /* Total Size of Environment Sector */
+#define C
ONFIG_ENV_IS_IN_FLASH
1
+#define C
ONFIG_ENV_OFFSET
0x00010000 /* Offset of Environment Sector */
+#define C
ONFIG_ENV_SIZE
0x1000 /* Total Size of Environment Sector */
-#define C
FG_ENV_SECT_SIZE
0x10000 /* see README - env sector total size */
+#define C
ONFIG_ENV_SECT_SIZE
0x10000 /* see README - env sector total size */
#else /* Use EEPROM for environment variables */
#else /* Use EEPROM for environment variables */
-#define C
FG_ENV_IS_IN_EEPROM
1 /* use EEPROM for environment vars */
-#define C
FG_ENV_OFFSET
0x000 /* environment starts at the beginning of the EEPROM */
-#define C
FG_ENV_SIZE
0x400 /* 1024 bytes may be used for env vars */
+#define C
ONFIG_ENV_IS_IN_EEPROM
1 /* use EEPROM for environment vars */
+#define C
ONFIG_ENV_OFFSET
0x000 /* environment starts at the beginning of the EEPROM */
+#define C
ONFIG_ENV_SIZE
0x400 /* 1024 bytes may be used for env vars */
/* total size of a CAT24WC08 is 1024 bytes */
#endif
/* total size of a CAT24WC08 is 1024 bytes */
#endif
@@
-173,22
+173,14
@@
* I2C EEPROM (CAT24WC08) for environment
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
* I2C EEPROM (CAT24WC08) for environment
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_SLAVE 0x7F
+#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define C
FG_I2C_EEPROM_ADDR
0x50 /* EEPROM CAT28WC08 */
-#define C
FG_I2C_EEPROM_ADDR_LEN 1
/* bytes of address */
+#define C
ONFIG_SYS_I2C_EEPROM_ADDR
0x50 /* EEPROM CAT28WC08 */
+#define C
ONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
/* mask of address bits that overflow into the "EEPROM chip address" */
-#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
-#define CFG_CACHELINE_SIZE 32 /* ... */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
/*
* Init Memory Controller:
/*
* Init Memory Controller:
@@
-204,29
+196,29
@@
*/
/* Memory Bank 0 (Flash Bank 0) initialization */
*/
/* Memory Bank 0 (Flash Bank 0) initialization */
-#define C
FG_EBC_PB0AP
0x92015480
-#define C
FG_EBC_PB0CR
0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */
+#define C
ONFIG_SYS_EBC_PB0AP
0x92015480
+#define C
ONFIG_SYS_EBC_PB0CR
0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */
/* Memory Bank 1 (CAN/USB) initialization */
/* Memory Bank 1 (CAN/USB) initialization */
-#define C
FG_EBC_PB1AP
0x010053C0 /* enable Ready, BEM=1 */
-#define C
FG_EBC_PB1CR
0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
+#define C
ONFIG_SYS_EBC_PB1AP
0x010053C0 /* enable Ready, BEM=1 */
+#define C
ONFIG_SYS_EBC_PB1CR
0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 2 (Misc-IO/LEDs) initialization */
/* Memory Bank 2 (Misc-IO/LEDs) initialization */
-#define C
FG_EBC_PB2AP
0x000004c0 /* no Ready, BEM=1 */
-#define C
FG_EBC_PB2CR
0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
+#define C
ONFIG_SYS_EBC_PB2AP
0x000004c0 /* no Ready, BEM=1 */
+#define C
ONFIG_SYS_EBC_PB2CR
0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 3 (CAN Features) initialization */
/* Memory Bank 3 (CAN Features) initialization */
-#define C
FG_EBC_PB3AP
0x80000040 /* no Ready, BEM=1 */
-#define C
FG_EBC_PB3CR
0xF021C000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=32bit */
+#define C
ONFIG_SYS_EBC_PB3AP
0x80000040 /* no Ready, BEM=1 */
+#define C
ONFIG_SYS_EBC_PB3CR
0xF021C000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=32bit */
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in RAM)
*/
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in RAM)
*/
-#define C
FG_INIT_RAM_ADDR
0x00ef0000 /* inside of SDRAM */
-#define C
FG_INIT_RAM_END
0x0f00 /* End of used area in RAM */
-#define C
FG_GBL_DATA_SIZE
64 /* size in bytes reserved for initial data */
-#define C
FG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG
_GBL_DATA_SIZE)
-#define C
FG_INIT_SP_OFFSET CFG
_GBL_DATA_OFFSET
+#define C
ONFIG_SYS_INIT_RAM_ADDR
0x00ef0000 /* inside of SDRAM */
+#define C
ONFIG_SYS_INIT_RAM_END
0x0f00 /* End of used area in RAM */
+#define C
ONFIG_SYS_GBL_DATA_SIZE
64 /* size in bytes reserved for initial data */
+#define C
ONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS
_GBL_DATA_SIZE)
+#define C
ONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS
_GBL_DATA_OFFSET
/*
/*