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imx: wandboard: convert FEC support to DM_ETH
[platform/kernel/u-boot.git]
/
include
/
configs
/
C29XPCIE.h
diff --git
a/include/configs/C29XPCIE.h
b/include/configs/C29XPCIE.h
index
ebf44b5
..
5a1a29b
100644
(file)
--- a/
include/configs/C29XPCIE.h
+++ b/
include/configs/C29XPCIE.h
@@
-17,7
+17,6
@@
#ifdef CONFIG_NAND
#ifdef CONFIG_TPL_BUILD
#ifdef CONFIG_NAND
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
@@
-33,7
+32,6
@@
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_TEXT_BASE 0xff800000
#define CONFIG_SPL_MAX_SIZE 8192
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
#define CONFIG_SPL_MAX_SIZE 8192
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
@@
-43,7
+41,6
@@
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
@@
-69,7
+66,6
@@
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/*
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/*
@@
-357,8
+353,6
@@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* eSPI - Enhanced SPI */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* eSPI - Enhanced SPI */
-#define CONFIG_SF_DEFAULT_SPEED 10000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#ifdef CONFIG_TSEC_ENET
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#ifdef CONFIG_TSEC_ENET
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
@@
-382,10
+376,6
@@
*/
#if defined(CONFIG_SYS_RAMBOOT)
#if defined(CONFIG_RAMBOOT_SPIFLASH)
*/
#if defined(CONFIG_SYS_RAMBOOT)
#if defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS 0
-#define CONFIG_ENV_SPI_CS 0
-#define CONFIG_ENV_SPI_MAX_HZ 10000000
-#define CONFIG_ENV_SPI_MODE 0
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_SIZE 0x2000