- static char *register_names[] =
- {
- /* SH MEDIA MODE (ISA 32) */
- /* general registers (64-bit) 0-63 */
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
- "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
- "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
- "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
- "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
-
- /* pc (64-bit) 64 */
- "pc",
-
- /* status reg., saved status reg., saved pc reg. (64-bit) 65-67 */
- "sr", "ssr", "spc",
-
- /* target registers (64-bit) 68-75*/
- "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
-
- /* floating point state control register (32-bit) 76 */
- "fpscr",
-
- /* single precision floating point registers (32-bit) 77-140*/
- "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
- "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
- "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
- "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
- "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39",
- "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47",
- "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55",
- "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63",
-
- /* double precision registers (pseudo) 141-172 */
- "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
- "dr16", "dr18", "dr20", "dr22", "dr24", "dr26", "dr28", "dr30",
- "dr32", "dr34", "dr36", "dr38", "dr40", "dr42", "dr44", "dr46",
- "dr48", "dr50", "dr52", "dr54", "dr56", "dr58", "dr60", "dr62",
-
- /* floating point pairs (pseudo) 173-204*/
- "fp0", "fp2", "fp4", "fp6", "fp8", "fp10", "fp12", "fp14",
- "fp16", "fp18", "fp20", "fp22", "fp24", "fp26", "fp28", "fp30",
- "fp32", "fp34", "fp36", "fp38", "fp40", "fp42", "fp44", "fp46",
- "fp48", "fp50", "fp52", "fp54", "fp56", "fp58", "fp60", "fp62",
-
- /* floating point vectors (4 floating point regs) (pseudo) 205-220*/
- "fv0", "fv4", "fv8", "fv12", "fv16", "fv20", "fv24", "fv28",
- "fv32", "fv36", "fv40", "fv44", "fv48", "fv52", "fv56", "fv60",
-
- /* SH COMPACT MODE (ISA 16) (all pseudo) 221-272*/
- "r0_c", "r1_c", "r2_c", "r3_c", "r4_c", "r5_c", "r6_c", "r7_c",
- "r8_c", "r9_c", "r10_c", "r11_c", "r12_c", "r13_c", "r14_c", "r15_c",
- "pc_c",
- "gbr_c", "mach_c", "macl_c", "pr_c", "t_c",
- "fpscr_c", "fpul_c",
- "fr0_c", "fr1_c", "fr2_c", "fr3_c", "fr4_c", "fr5_c", "fr6_c", "fr7_c",
- "fr8_c", "fr9_c", "fr10_c", "fr11_c", "fr12_c", "fr13_c", "fr14_c", "fr15_c",
- "dr0_c", "dr2_c", "dr4_c", "dr6_c", "dr8_c", "dr10_c", "dr12_c", "dr14_c",
- "fv0_c", "fv4_c", "fv8_c", "fv12_c",
- /* FIXME!!!! XF0 XF15, XD0 XD14 ?????*/
+ static char *register_names[] = {
+ /* general registers 0-15 */
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ /* 16 - 22 */
+ "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
+ /* 23, 24 */
+ "", "",
+ /* floating point registers 25 - 40 -- not for nofpu target */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* 41, 42 */
+ "ssr", "spc",
+ /* bank 0 43 - 50 */
+ "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
+ /* bank 1 51 - 58 */
+ "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
+ /* double precision (pseudo) 59 - 66 -- not for nofpu target */
+ "", "", "", "", "", "", "", "",
+ /* vectors (pseudo) 67 - 70 -- not for nofpu target */
+ "", "", "", "",