- bdf = bdf - PCI_BDF(bus->seq, 0, 0);
- val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
+ val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus),
+ PCI_DEV(bdf), PCI_FUNC(bdf),
+ offset);
- bdf = bdf - PCI_BDF(bus->seq, 0, 0);
- val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
+ val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus),
+ PCI_DEV(bdf), PCI_FUNC(bdf),
+ offset);
- ret = fsl_pcie_read_config(bus, PCI_BDF(bus->seq, 0, 0),
+ ret = fsl_pcie_read_config(bus, PCI_BDF(dev_seq(bus), 0, 0),
- return fsl_pcie_write_config(bus, PCI_BDF(bus->seq, 0, 0),
+ return fsl_pcie_write_config(bus, PCI_BDF(dev_seq(bus), 0, 0),
fsl_pcie_hose_write_config_dword(pcie, classcode_reg, val);
if (pcie->block_rev >= PEX_IP_BLK_REV_3_0)
fsl_pcie_hose_write_config_dword(pcie, classcode_reg, val);
if (pcie->block_rev >= PEX_IP_BLK_REV_3_0)
- { .compatible = "fsl,pcie-mpc8548", .data = (ulong)&p1_p2_data },
+ { .compatible = "fsl,mpc8548-pcie", .data = (ulong)&p1_p2_data },
{ .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data },
{ .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data },
{ .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data },
{ .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data },
{ .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data },
{ .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data },