+
+static int ks2_eth_free_pkt(struct udevice *dev, uchar *packet,
+ int length)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+
+ ksnav_release_rxhd(priv->netcp_pktdma, priv->hd);
+
+ return 0;
+}
+
+static void ks2_eth_stop(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+
+ if (!priv->emac_open)
+ return;
+ ethss_stop();
+
+ ksnav_close(priv->netcp_pktdma);
+ qm_close();
+ phy_shutdown(priv->phydev);
+ priv->emac_open = false;
+}
+
+int ks2_eth_read_rom_hwaddr(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ u32 maca = 0;
+ u32 macb = 0;
+
+ /* Read the e-fuse mac address */
+ if (priv->slave_port == 1) {
+ maca = __raw_readl(MAC_ID_BASE_ADDR);
+ macb = __raw_readl(MAC_ID_BASE_ADDR + 4);
+ }
+
+ pdata->enetaddr[0] = (macb >> 8) & 0xff;
+ pdata->enetaddr[1] = (macb >> 0) & 0xff;
+ pdata->enetaddr[2] = (maca >> 24) & 0xff;
+ pdata->enetaddr[3] = (maca >> 16) & 0xff;
+ pdata->enetaddr[4] = (maca >> 8) & 0xff;
+ pdata->enetaddr[5] = (maca >> 0) & 0xff;
+
+ return 0;
+}
+
+int ks2_eth_write_hwaddr(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+
+ writel(mac_hi(pdata->enetaddr),
+ DEVICE_EMACSW_BASE(pdata->iobase, priv->slave_port - 1) +
+ CPGMACSL_REG_SA_HI);
+ writel(mac_lo(pdata->enetaddr),
+ DEVICE_EMACSW_BASE(pdata->iobase, priv->slave_port - 1) +
+ CPGMACSL_REG_SA_LO);
+
+ return 0;
+}
+
+static int ks2_eth_probe(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+ struct mii_dev *mdio_bus;
+ int ret;
+
+ priv->dev = dev;
+
+ /* These clock enables has to be moved to common location */
+ if (cpu_is_k2g())
+ writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
+
+ /* By default, select PA PLL clock as PA clock source */
+#ifndef CONFIG_SOC_K2G
+ if (psc_enable_module(KS2_LPSC_PA))
+ return -EACCES;
+#endif
+ if (psc_enable_module(KS2_LPSC_CPGMAC))
+ return -EACCES;
+ if (psc_enable_module(KS2_LPSC_CRYPTO))
+ return -EACCES;
+
+ if (cpu_is_k2e() || cpu_is_k2l())
+ pll_pa_clk_sel();
+
+
+ priv->net_rx_buffs.buff_ptr = rx_buffs;
+ priv->net_rx_buffs.num_buffs = RX_BUFF_NUMS;
+ priv->net_rx_buffs.buff_len = RX_BUFF_LEN;
+
+ if (priv->slave_port == 1) {
+ /*
+ * Register MDIO bus for slave 0 only, other slave have
+ * to re-use the same
+ */
+ mdio_bus = mdio_alloc();
+ if (!mdio_bus) {
+ error("MDIO alloc failed\n");
+ return -ENOMEM;
+ }
+ priv->mdio_bus = mdio_bus;
+ mdio_bus->read = keystone2_mdio_read;
+ mdio_bus->write = keystone2_mdio_write;
+ mdio_bus->reset = keystone2_mdio_reset;
+ mdio_bus->priv = priv->mdio_base;
+ sprintf(mdio_bus->name, "ethernet-mdio");
+
+ ret = mdio_register(mdio_bus);
+ if (ret) {
+ error("MDIO bus register failed\n");
+ return ret;
+ }
+ } else {
+ /* Get the MDIO bus from slave 0 device */
+ struct ks2_eth_priv *parent_priv;
+
+ parent_priv = dev_get_priv(dev->parent);
+ priv->mdio_bus = parent_priv->mdio_bus;
+ }
+
+#ifndef CONFIG_SOC_K2G
+ keystone2_net_serdes_setup();
+#endif
+
+ priv->netcp_pktdma = &netcp_pktdma;
+
+ if (priv->has_mdio) {
+ priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
+ dev, priv->phy_if);
+ phy_config(priv->phydev);
+ }
+
+ return 0;
+}
+
+int ks2_eth_remove(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+
+ free(priv->phydev);
+ mdio_unregister(priv->mdio_bus);
+ mdio_free(priv->mdio_bus);
+
+ return 0;
+}
+
+static const struct eth_ops ks2_eth_ops = {
+ .start = ks2_eth_start,
+ .send = ks2_eth_send,
+ .recv = ks2_eth_recv,
+ .free_pkt = ks2_eth_free_pkt,
+ .stop = ks2_eth_stop,
+ .read_rom_hwaddr = ks2_eth_read_rom_hwaddr,
+ .write_hwaddr = ks2_eth_write_hwaddr,
+};
+
+static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *sl_dev;
+ int interfaces;
+ int sec_slave;
+ int slave;
+ int ret;
+ char *slave_name;
+
+ interfaces = fdt_subnode_offset(fdt, gbe, "interfaces");
+ fdt_for_each_subnode(slave, fdt, interfaces) {
+ int slave_no;
+
+ slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT);
+ if (slave_no == -ENOENT)
+ continue;
+
+ if (slave_no == 0) {
+ /* This is the current eth device */
+ *gbe_0 = slave;
+ } else {
+ /* Slave devices to be registered */
+ slave_name = malloc(20);
+ snprintf(slave_name, 20, "netcp@slave-%d", slave_no);
+ ret = device_bind_driver_to_node(dev, "eth_ks2_sl",
+ slave_name, slave,
+ &sl_dev);
+ if (ret) {
+ error("ks2_net - not able to bind slave interfaces\n");
+ return ret;
+ }
+ }
+ }
+
+ sec_slave = fdt_subnode_offset(fdt, gbe, "secondary-slave-ports");
+ fdt_for_each_subnode(slave, fdt, sec_slave) {
+ int slave_no;
+
+ slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT);
+ if (slave_no == -ENOENT)
+ continue;
+
+ /* Slave devices to be registered */
+ slave_name = malloc(20);
+ snprintf(slave_name, 20, "netcp@slave-%d", slave_no);
+ ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name,
+ slave, &sl_dev);
+ if (ret) {
+ error("ks2_net - not able to bind slave interfaces\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int ks2_eth_parse_slave_interface(int netcp, int slave,
+ struct ks2_eth_priv *priv,
+ struct eth_pdata *pdata)
+{
+ const void *fdt = gd->fdt_blob;
+ int mdio;
+ int phy;
+ int dma_count;
+ u32 dma_channel[8];
+
+ priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
+ priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
+
+ /* U-Boot slave port number starts with 1 instead of 0 */
+ priv->slave_port += 1;
+
+ dma_count = fdtdec_get_int_array_count(fdt, netcp,
+ "ti,navigator-dmas",
+ dma_channel, 8);
+
+ if (dma_count > (2 * priv->slave_port)) {
+ int dma_idx;
+
+ dma_idx = priv->slave_port * 2 - 1;
+ priv->net_rx_buffs.rx_flow = dma_channel[dma_idx];
+ }
+
+ priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
+
+ phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+ if (phy >= 0) {
+ priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
+
+ mdio = fdt_parent_offset(fdt, phy);
+ if (mdio < 0) {
+ error("mdio dt not found\n");
+ return -ENODEV;
+ }
+ priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg");
+ }
+
+ if (priv->link_type == LINK_TYPE_SGMII_MAC_TO_PHY_MODE) {
+ priv->phy_if = PHY_INTERFACE_MODE_SGMII;
+ pdata->phy_interface = priv->phy_if;
+ priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
+ priv->has_mdio = true;
+ } else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ pdata->phy_interface = priv->phy_if;
+ priv->has_mdio = true;
+ }
+
+ return 0;
+}
+
+static int ks2_sl_eth_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ const void *fdt = gd->fdt_blob;
+ int slave = dev->of_offset;
+ int interfaces;
+ int gbe;
+ int netcp_devices;
+ int netcp;
+
+ interfaces = fdt_parent_offset(fdt, slave);
+ gbe = fdt_parent_offset(fdt, interfaces);
+ netcp_devices = fdt_parent_offset(fdt, gbe);
+ netcp = fdt_parent_offset(fdt, netcp_devices);
+
+ ks2_eth_parse_slave_interface(netcp, slave, priv, pdata);
+
+ pdata->iobase = fdtdec_get_addr(fdt, netcp, "reg");
+
+ return 0;
+}
+
+static int ks2_eth_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ks2_eth_priv *priv = dev_get_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ const void *fdt = gd->fdt_blob;
+ int gbe_0 = -ENODEV;
+ int netcp_devices;
+ int gbe;
+
+ netcp_devices = fdt_subnode_offset(fdt, dev->of_offset,
+ "netcp-devices");
+ gbe = fdt_subnode_offset(fdt, netcp_devices, "gbe");
+
+ ks2_eth_bind_slaves(dev, gbe, &gbe_0);
+
+ ks2_eth_parse_slave_interface(dev->of_offset, gbe_0, priv, pdata);
+
+ pdata->iobase = dev_get_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id ks2_eth_ids[] = {
+ { .compatible = "ti,netcp-1.0" },
+ { }
+};
+
+U_BOOT_DRIVER(eth_ks2_slave) = {
+ .name = "eth_ks2_sl",
+ .id = UCLASS_ETH,
+ .ofdata_to_platdata = ks2_sl_eth_ofdata_to_platdata,
+ .probe = ks2_eth_probe,
+ .remove = ks2_eth_remove,
+ .ops = &ks2_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct ks2_eth_priv),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+U_BOOT_DRIVER(eth_ks2) = {
+ .name = "eth_ks2",
+ .id = UCLASS_ETH,
+ .of_match = ks2_eth_ids,
+ .ofdata_to_platdata = ks2_eth_ofdata_to_platdata,
+ .probe = ks2_eth_probe,
+ .remove = ks2_eth_remove,
+ .ops = &ks2_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct ks2_eth_priv),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif