sifive: reset: add DM based reset driver for SiFive SoC's

[platform/kernel/u-boot.git] / drivers / dma / dma-uclass.c

diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 9c961cf..8cbb364 100644 (file)
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -10,7 +10,11 @@
  */
 
 #include <common.h>
  */
 
 #include <common.h>

+#include <cpu_func.h>

 #include <dm.h>
 #include <dm.h>

+#include <log.h>
+#include <malloc.h>
+#include <asm/cache.h>

 #include <dm/read.h>
 #include <dma-uclass.h>
 #include <dt-structs.h>
 #include <dm/read.h>
 #include <dma-uclass.h>
 #include <dt-structs.h>


@@ -121,10 +125,10 @@ int dma_free(struct dma *dma)
 
        debug("%s(dma=%p)\n", __func__, dma);
 
 
        debug("%s(dma=%p)\n", __func__, dma);
 

-       if (!ops->free)
+       if (!ops->rfree)

                return 0;
 
                return 0;
 

-       return ops->free(dma);
+       return ops->rfree(dma);

 }
 
 int dma_enable(struct dma *dma)
 }
 
 int dma_enable(struct dma *dma)


@@ -186,6 +190,18 @@ int dma_send(struct dma *dma, void *src, size_t len, void *metadata)
 
        return ops->send(dma, src, len, metadata);
 }
 
        return ops->send(dma, src, len, metadata);
 }

+
+int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data)
+{
+       struct dma_ops *ops = dma_dev_ops(dma->dev);
+
+       debug("%s(dma=%p)\n", __func__, dma);
+
+       if (!ops->get_cfg)
+               return -ENOSYS;
+
+       return ops->get_cfg(dma, cfg_id, cfg_data);
+}

 #endif /* CONFIG_DMA_CHANNELS */
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)
 #endif /* CONFIG_DMA_CHANNELS */
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)