+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57