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Convert CONFIG_SYS_MONITOR_LEN to Kconfig
[platform/kernel/u-boot.git]
/
configs
/
T1042D4RDB_NAND_defconfig
diff --git
a/configs/T1042D4RDB_NAND_defconfig
b/configs/T1042D4RDB_NAND_defconfig
index
e51e363
..
4088d40
100644
(file)
--- a/
configs/T1042D4RDB_NAND_defconfig
+++ b/
configs/T1042D4RDB_NAND_defconfig
@@
-1,5
+1,5
@@
CONFIG_PPC=y
CONFIG_PPC=y
-CONFIG_
SYS_
TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
@@
-10,10
+10,10
@@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
+CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_T1042D4RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_TARGET_T1042D4RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@
-21,6
+21,8
@@
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y
CONFIG_PCIE4=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y
CONFIG_PCIE4=y
+CONFIG_SYS_FSL_NUM_CC_PLLS=2
+CONFIG_SYS_MONITOR_LEN=786432
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@
-60,6
+62,8
@@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
+CONFIG_LOADS_ECHO=y
+CONFIG_SYS_LOADS_BAUD_CHANGE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
@@
-76,7
+80,6
@@
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="uImage"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_BOOTFILE="uImage"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4"
-CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
@@
-98,8
+101,11
@@
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
CONFIG_SYS_MAX_FLASH_BANKS=2
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_MAX_FLASH_BANKS=2
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
@@
-112,7
+118,6
@@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_PHYLIB=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
-CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y