fix build error

[platform/upstream/openblas.git] / common_mips64.h

diff --git a/common_mips64.h b/common_mips64.h
index d9cdc49..1163413 100644 (file)
--- a/common_mips64.h
+++ b/common_mips64.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
 /*****************************************************************************

-Copyright (c) 2011, Lab of Parallel Software and Computational Science,ICSAS
+Copyright (c) 2011-2014, The OpenBLAS Project

 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without


@@ -13,21 +13,21 @@ met:
       notice, this list of conditions and the following disclaimer in
       the documentation and/or other materials provided with the
       distribution.
       notice, this list of conditions and the following disclaimer in
       the documentation and/or other materials provided with the
       distribution.

-   3. Neither the name of the ISCAS nor the names of its contributors may 
-      be used to endorse or promote products derived from this software 
-      without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+   3. Neither the name of the OpenBLAS project nor the names of 
+      its contributors may be used to endorse or promote products 
+      derived from this software without specific prior written 
+      permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE

 USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-

 **********************************************************************************/
 
 /*********************************************************************/
 **********************************************************************************/
 
 /*********************************************************************/


@@ -71,37 +71,16 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef COMMON_MIPS64
 #define COMMON_MIPS64
 
 #ifndef COMMON_MIPS64
 #define COMMON_MIPS64
 

-#define MB
-#define WMB
+#define MB  __sync_synchronize()
+#define WMB __sync_synchronize()

 
 #define INLINE inline
 
 #ifndef ASSEMBLER
 
 
 #define INLINE inline
 
 #ifndef ASSEMBLER
 

-static void INLINE blas_lock(volatile unsigned long *address){
-
-  long int ret, val = 1;
-
-  do {
-    while (*address) {YIELDING;};
-
-    __asm__ __volatile__(
-                        "1:    ll      %0, %3\n"
-                        "      ori     %2, %0, 1\n"
-                        "      sc      %2, %1\n"
-                        "      beqz    %2, 1b\n"
-                        "       andi   %2, %0, 1\n"
-                        "      sync\n"
-                        : "=&r" (val), "=m" (address), "=&r" (ret)
-                        : "m" (address)
-                        : "memory");
-
-  } while (ret);
-}
-

 static inline unsigned int rpcc(void){
   unsigned long ret;
 static inline unsigned int rpcc(void){
   unsigned long ret;

-#if defined(LOONGSON3A) || defined(LOONGSON3B)
+

   //  unsigned long long tmp;
   //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
   //ret=tmp;
   //  unsigned long long tmp;
   //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
   //ret=tmp;


@@ -110,18 +89,12 @@ static inline unsigned int rpcc(void){
                        "rdhwr %0, $2\n"
                        ".set pop": "=r"(ret):: "memory");
 
                        "rdhwr %0, $2\n"
                        ".set pop": "=r"(ret):: "memory");
 

-#else
-  __asm__ __volatile__(".set   push    \n"                                     
-          ".set   mips32r2\n"                                                  
-          "rdhwr %0, $30  \n"                                                  
-          ".set pop" : "=r"(ret) : : "memory");
-#endif

   return ret;
 }
   return ret;
 }

+#define RPCC_DEFINED

 
 

-#if defined(LOONGSON3A) || defined(LOONGSON3B)

 #ifndef NO_AFFINITY
 #ifndef NO_AFFINITY

-#define WHEREAMI
+//#define WHEREAMI

 static inline int WhereAmI(void){
   int ret=0;
   __asm__ __volatile__(".set push \n"
 static inline int WhereAmI(void){
   int ret=0;
   __asm__ __volatile__(".set push \n"


@@ -132,7 +105,6 @@ static inline int WhereAmI(void){
 
 }
 #endif
 
 }
 #endif

-#endif

 
 static inline int blas_quickdivide(blasint x, blasint y){
   return x / y;
 
 static inline int blas_quickdivide(blasint x, blasint y){
   return x / y;


@@ -191,13 +163,13 @@ static inline int blas_quickdivide(blasint x, blasint y){
 #define CMPEQ  c.eq.s
 #define CMPLE  c.le.s
 #define CMPLT  c.lt.s
 #define CMPEQ  c.eq.s
 #define CMPLE  c.le.s
 #define CMPLT  c.lt.s

-#define PLU     plu.ps                                                    
-#define PLL     pll.ps   
-#define PUU     puu.ps    
-#define PUL     pul.ps   
-#define MADPS   madd.ps   
-#define CVTU    cvt.s.pu    
-#define CVTL    cvt.s.pl 
+#define PLU     plu.ps
+#define PLL     pll.ps
+#define PUU     puu.ps
+#define PUL     pul.ps
+#define MADPS   madd.ps
+#define CVTU    cvt.s.pu
+#define CVTL    cvt.s.pl

 #define        NEG     neg.s
 #endif
 
 #define        NEG     neg.s
 #endif
 


@@ -279,9 +251,9 @@ REALNAME: ;\
 
 #if defined(LOONGSON3A) || defined(LOONGSON3B)
 #define PREFETCHD_(x) ld $0, x
 
 #if defined(LOONGSON3A) || defined(LOONGSON3B)
 #define PREFETCHD_(x) ld $0, x

-#define PREFETCHD(x)  PREFETCHD_(x)  
+#define PREFETCHD(x)  PREFETCHD_(x)

 #else
 #else

-#define PREFETCHD(x) 
+#define PREFETCHD(x)

 #endif
 
 #endif
 #endif
 
 #endif