+ switch (pll) {
+ case MAIN_PLL:
+ speed = get_max_dev_speed();
+ data = &core_pll_config[speed];
+ break;
+ case TETRIS_PLL:
+ speed = get_max_arm_speed();
+ data = &tetris_pll_config[speed];
+ break;
+ case PASS_PLL:
+ data = &pa_pll_config;
+ break;
+ default:
+ data = NULL;
+ }
+
+ return data;
+}
+
+#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
+struct eth_priv_t eth_priv_cfg[] = {
+ {
+ .int_name = "K2L_EMAC",
+ .rx_flow = 0,
+ .phy_addr = 0,
+ .slave_port = 1,
+ .sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
+ },
+ {
+ .int_name = "K2L_EMAC1",
+ .rx_flow = 8,
+ .phy_addr = 1,
+ .slave_port = 2,
+ .sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
+ },
+ {
+ .int_name = "K2L_EMAC2",
+ .rx_flow = 16,
+ .phy_addr = 2,
+ .slave_port = 3,
+ .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
+ },
+ {
+ .int_name = "K2L_EMAC3",
+ .rx_flow = 32,
+ .phy_addr = 3,
+ .slave_port = 4,
+ .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
+ },
+};