+ /* TI DP83867 */
+ else if (phydev->phy_id == 0x2000a231) {
+ /* configure register 0x170 for ref CLKOUT */
+ phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x001f);
+ phy_write(phydev, MDIO_DEVAD_NONE, 14, 0x0170);
+ phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x401f);
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 14);
+ val &= ~0x1f00;
+ val |= 0x0b00; /* chD tx clock*/
+ phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
+ }
+