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rename CFG_ macros to CONFIG_SYS
[platform/kernel/u-boot.git]
/
board
/
freescale
/
m5253demo
/
m5253demo.c
diff --git
a/board/freescale/m5253demo/m5253demo.c
b/board/freescale/m5253demo/m5253demo.c
index
2eb6a04
..
b39cd4d
100644
(file)
--- a/
board/freescale/m5253demo/m5253demo.c
+++ b/
board/freescale/m5253demo/m5253demo.c
@@
-45,7
+45,7
@@
phys_size_t initdram(int board_type)
if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) {
u32 RC, temp;
if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) {
u32 RC, temp;
- RC = (C
FG
_CLK / 1000000) >> 1;
+ RC = (C
ONFIG_SYS
_CLK / 1000000) >> 1;
RC = (RC * 15) >> 4;
/* Initialize DRAM Control Register: DCR */
RC = (RC * 15) >> 4;
/* Initialize DRAM Control Register: DCR */
@@
-56,7
+56,7
@@
phys_size_t initdram(int board_type)
__asm__("nop");
/* Initialize DMR0 */
__asm__("nop");
/* Initialize DMR0 */
- dramsize = (C
FG
_SDRAM_SIZE << 20);
+ dramsize = (C
ONFIG_SYS
_SDRAM_SIZE << 20);
temp = (dramsize - 1) & 0xFFFC0000;
mbar_writeLong(MCFSIM_DMR0, temp | 1);
__asm__("nop");
temp = (dramsize - 1) & 0xFFFC0000;
mbar_writeLong(MCFSIM_DMR0, temp | 1);
__asm__("nop");
@@
-65,7
+65,7
@@
phys_size_t initdram(int board_type)
__asm__("nop");
/* Write to this block to initiate precharge */
__asm__("nop");
/* Write to this block to initiate precharge */
- *(u32 *) (C
FG
_SDRAM_BASE) = 0xa5a5a5a5;
+ *(u32 *) (C
ONFIG_SYS
_SDRAM_BASE) = 0xa5a5a5a5;
__asm__("nop");
/* Set RE bit in DACR */
__asm__("nop");
/* Set RE bit in DACR */
@@
-81,7
+81,7
@@
phys_size_t initdram(int board_type)
mbar_readLong(MCFSIM_DACR0) | 0x0040);
__asm__("nop");
mbar_readLong(MCFSIM_DACR0) | 0x0040);
__asm__("nop");
- *(u32 *) (C
FG
_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+ *(u32 *) (C
ONFIG_SYS
_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
}
return dramsize;
}
return dramsize;
@@
-104,7
+104,7
@@
int ide_preinit(void)
void ide_set_reset(int idereset)
{
void ide_set_reset(int idereset)
{
- volatile atac_t *ata = (atac_t *) C
FG
_ATA_BASE_ADDR;
+ volatile atac_t *ata = (atac_t *) C
ONFIG_SYS
_ATA_BASE_ADDR;
long period;
/* t1, t2, t3, t4, t5, t6, t9, tRD, tA */
int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */
long period;
/* t1, t2, t3, t4, t5, t6, t9, tRD, tA */
int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */
@@
-121,7
+121,7
@@
void ide_set_reset(int idereset)
mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
#define CALC_TIMING(t) (t + period - 1) / period
mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
#define CALC_TIMING(t) (t + period - 1) / period
- period = 1000000000 / (C
FG_CLK / 2);
/* period in ns */
+ period = 1000000000 / (C
ONFIG_SYS_CLK / 2);
/* period in ns */
/*ata->ton = CALC_TIMING (180); */
ata->t1 = CALC_TIMING(piotms[2][0]);
/*ata->ton = CALC_TIMING (180); */
ata->t1 = CALC_TIMING(piotms[2][0]);