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global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
[platform/kernel/u-boot.git]
/
board
/
freescale
/
ls1046ardb
/
ls1046ardb.c
diff --git
a/board/freescale/ls1046ardb/ls1046ardb.c
b/board/freescale/ls1046ardb/ls1046ardb.c
index
0a73fe8
..
1d12d91
100644
(file)
--- a/
board/freescale/ls1046ardb/ls1046ardb.c
+++ b/
board/freescale/ls1046ardb/ls1046ardb.c
@@
-1,11
+1,16
@@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductor, Inc.
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
#include <common.h>
#include <i2c.h>
#include <fdt_support.h>
*/
#include <common.h>
#include <i2c.h>
#include <fdt_support.h>
+#include <init.h>
+#include <semihosting.h>
+#include <serial.h>
+#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
@@
-21,10
+26,18
@@
#include <fsl_esdhc.h>
#include <power/mc34vr500_pmic.h>
#include "cpld.h"
#include <fsl_esdhc.h>
#include <power/mc34vr500_pmic.h>
#include "cpld.h"
-#include <fsl_sec.h>
DECLARE_GLOBAL_DATA_PTR;
DECLARE_GLOBAL_DATA_PTR;
+struct serial_device *default_serial_console(void)
+{
+#if IS_ENABLED(CONFIG_SEMIHOSTING_SERIAL)
+ if (semihosting_enabled())
+ return &serial_smh_device;
+#endif
+ return &eserial1_device;
+}
+
int board_early_init_f(void)
{
fsl_lsch2_early_init_f();
int board_early_init_f(void)
{
fsl_lsch2_early_init_f();
@@
-67,9
+80,9
@@
int checkboard(void)
int board_init(void)
{
int board_init(void)
{
- struct ccsr_scfg *scfg = (struct ccsr_scfg *)C
ONFI
G_SYS_FSL_SCFG_ADDR;
+ struct ccsr_scfg *scfg = (struct ccsr_scfg *)C
F
G_SYS_FSL_SCFG_ADDR;
-#ifdef CONFIG_
SECURE_BOOT
+#ifdef CONFIG_
NXP_ESBC
/*
* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
/*
* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@
-83,14
+96,14
@@
int board_init(void)
out_le32(SMMU_NSCR0, val);
#endif
out_le32(SMMU_NSCR0, val);
#endif
-#ifdef CONFIG_FSL_CAAM
- sec_init();
-#endif
-
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+ pci_init();
+#endif
+
/* invert AQR105 IRQ pins polarity */
out_be32(&scfg->intpcr, AQR105_IRQ_MASK);
/* invert AQR105 IRQ pins polarity */
out_be32(&scfg->intpcr, AQR105_IRQ_MASK);
@@
-133,7
+146,7
@@
int power_init_board(void)
void config_board_mux(void)
{
#ifdef CONFIG_HAS_FSL_XHCI_USB
void config_board_mux(void)
{
#ifdef CONFIG_HAS_FSL_XHCI_USB
- struct ccsr_scfg *scfg = (struct ccsr_scfg *)C
ONFI
G_SYS_FSL_SCFG_ADDR;
+ struct ccsr_scfg *scfg = (struct ccsr_scfg *)C
F
G_SYS_FSL_SCFG_ADDR;
u32 usb_pwrfault;
/* USB3 is not used, configure mux to IIC4_SCL/IIC4_SDA */
u32 usb_pwrfault;
/* USB3 is not used, configure mux to IIC4_SCL/IIC4_SDA */
@@
-157,7
+170,7
@@
int misc_init_r(void)
}
#endif
}
#endif
-int ft_board_setup(void *blob,
bd_t
*bd)
+int ft_board_setup(void *blob,
struct bd_info
*bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
@@
-172,8
+185,10
@@
int ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
ft_cpu_setup(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
fdt_fixup_fman_ethernet(blob);
#endif
fdt_fixup_fman_ethernet(blob);
#endif
+#endif
fdt_fixup_icid(blob);
fdt_fixup_icid(blob);