+#if CONFIG_IS_ENABLED(DM_I2C)
+ struct udevice *dev;
+ int ret;
+
+ ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
+ 1, &dev);
+ if (ret) {
+ printf("%s: Cannot find udev for a bus %d\n", __func__,
+ bus_num);
+ return;
+ }
+ dm_i2c_write(dev, 0, ®, 1);
+
+ /* Access to Control/Shared register */
+ ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
+ 1, &dev);
+ if (ret) {
+ printf("%s: Cannot find udev for a bus %d\n", __func__,
+ bus_num);
+ return;
+ }
+
+ reg = 0x0;
+ dm_i2c_write(dev, 0xff, ®, 1);
+
+ /* Read device revision and ID */
+ dm_i2c_read(dev, 1, ®, 1);
+ debug("Retimer version id = 0x%x\n", reg);
+
+ /* Enable Broadcast. All writes target all channel register sets */
+ reg = 0x0c;
+ dm_i2c_write(dev, 0xff, ®, 1);
+
+ /* Reset Channel Registers */
+ dm_i2c_read(dev, 0, ®, 1);
+ reg |= 0x4;
+ dm_i2c_write(dev, 0, ®, 1);
+
+ /* Enable override divider select and Enable Override Output Mux */
+ dm_i2c_read(dev, 9, ®, 1);
+ reg |= 0x24;
+ dm_i2c_write(dev, 9, ®, 1);
+
+ /* Select VCO Divider to full rate (000) */
+ dm_i2c_read(dev, 0x18, ®, 1);
+ reg &= 0x8f;
+ dm_i2c_write(dev, 0x18, ®, 1);
+
+ /* Selects active PFD MUX Input as Re-timed Data (001) */
+ dm_i2c_read(dev, 0x1e, ®, 1);
+ reg &= 0x3f;
+ reg |= 0x20;
+ dm_i2c_write(dev, 0x1e, ®, 1);
+
+ /* Set data rate as 10.3125 Gbps */
+ reg = 0x0;
+ dm_i2c_write(dev, 0x60, ®, 1);
+ reg = 0xb2;
+ dm_i2c_write(dev, 0x61, ®, 1);
+ reg = 0x90;
+ dm_i2c_write(dev, 0x62, ®, 1);
+ reg = 0xb3;
+ dm_i2c_write(dev, 0x63, ®, 1);
+ reg = 0xcd;
+ dm_i2c_write(dev, 0x64, ®, 1);
+#else