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rename CFG_ macros to CONFIG_SYS
[platform/kernel/u-boot.git]
/
board
/
esd
/
plu405
/
plu405.c
diff --git
a/board/esd/plu405/plu405.c
b/board/esd/plu405/plu405.c
index
3db9c0a
..
61186a8
100644
(file)
--- a/
board/esd/plu405/plu405.c
+++ b/
board/esd/plu405/plu405.c
@@
-113,8
+113,8
@@
int misc_init_r (void)
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
- dst = malloc(C
FG
_FPGA_MAX_SIZE);
- if (gunzip (dst, C
FG
_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
+ dst = malloc(C
ONFIG_SYS
_FPGA_MAX_SIZE);
+ if (gunzip (dst, C
ONFIG_SYS
_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
printf ("GUNZIP ERROR - must RESET board to recover\n");
do_reset (NULL, 0, 0, NULL);
}
printf ("GUNZIP ERROR - must RESET board to recover\n");
do_reset (NULL, 0, 0, NULL);
}
@@
-179,23
+179,23
@@
int misc_init_r (void)
/*
* Reset external DUARTs
*/
/*
* Reset external DUARTs
*/
- out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
FG
_DUART_RST);
+ out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
ONFIG_SYS
_DUART_RST);
udelay(10);
udelay(10);
- out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~C
FG
_DUART_RST);
+ out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~C
ONFIG_SYS
_DUART_RST);
udelay(1000);
/*
* Set NAND-FLASH GPIO signals to default
*/
out_be32((void*)GPIO0_OR,
udelay(1000);
/*
* Set NAND-FLASH GPIO signals to default
*/
out_be32((void*)GPIO0_OR,
- in_be32((void*)GPIO0_OR) & ~(C
FG_NAND_CLE | CFG
_NAND_ALE));
- out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
FG
_NAND_CE);
+ in_be32((void*)GPIO0_OR) & ~(C
ONFIG_SYS_NAND_CLE | CONFIG_SYS
_NAND_ALE));
+ out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
ONFIG_SYS
_NAND_CE);
/*
* Setup EEPROM write protection
*/
/*
* Setup EEPROM write protection
*/
- out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
FG
_EEPROM_WP);
- out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) | C
FG
_EEPROM_WP);
+ out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | C
ONFIG_SYS
_EEPROM_WP);
+ out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) | C
ONFIG_SYS
_EEPROM_WP);
/*
* Enable interrupts in exar duart mcr[3]
/*
* Enable interrupts in exar duart mcr[3]
@@
-230,15
+230,15
@@
int checkboard (void)
void ide_set_reset(int on)
{
volatile unsigned short *fpga_mode =
void ide_set_reset(int on)
{
volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)C
FG_FPGA_BASE_ADDR + CFG
_FPGA_CTRL);
+ (unsigned short *)((ulong)C
ONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS
_FPGA_CTRL);
/*
* Assert or deassert CompactFlash Reset Pin
*/
if (on) { /* assert RESET */
/*
* Assert or deassert CompactFlash Reset Pin
*/
if (on) { /* assert RESET */
- *fpga_mode &= ~(C
FG
_FPGA_CTRL_CF_RESET);
+ *fpga_mode &= ~(C
ONFIG_SYS
_FPGA_CTRL_CF_RESET);
} else { /* release RESET */
} else { /* release RESET */
- *fpga_mode |= C
FG
_FPGA_CTRL_CF_RESET;
+ *fpga_mode |= C
ONFIG_SYS
_FPGA_CTRL_CF_RESET;
}
}
#endif /* CONFIG_IDE_RESET */
}
}
#endif /* CONFIG_IDE_RESET */
@@
-254,7
+254,7
@@
void reset_phy(void)
#endif
}
#endif
}
-#if defined(C
FG
_EEPROM_WREN)
+#if defined(C
ONFIG_SYS
_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
* 0: disable write
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
* 0: disable write
@@
-265,26
+265,26
@@
void reset_phy(void)
*/
int eeprom_write_enable (unsigned dev_addr, int state)
{
*/
int eeprom_write_enable (unsigned dev_addr, int state)
{
- if (C
FG
_I2C_EEPROM_ADDR != dev_addr) {
+ if (C
ONFIG_SYS
_I2C_EEPROM_ADDR != dev_addr) {
return -1;
} else {
switch (state) {
case 1:
/* Enable write access, clear bit GPIO0. */
out_be32((void*)GPIO0_OR,
return -1;
} else {
switch (state) {
case 1:
/* Enable write access, clear bit GPIO0. */
out_be32((void*)GPIO0_OR,
- in_be32((void*)GPIO0_OR) & ~C
FG
_EEPROM_WP);
+ in_be32((void*)GPIO0_OR) & ~C
ONFIG_SYS
_EEPROM_WP);
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO0. */
out_be32((void*)GPIO0_OR,
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO0. */
out_be32((void*)GPIO0_OR,
- in_be32((void*)GPIO0_OR) | C
FG
_EEPROM_WP);
+ in_be32((void*)GPIO0_OR) | C
ONFIG_SYS
_EEPROM_WP);
state = 0;
break;
default:
/* Read current status back. */
state = (0 == (in_be32((void*)GPIO0_OR) &
state = 0;
break;
default:
/* Read current status back. */
state = (0 == (in_be32((void*)GPIO0_OR) &
- C
FG
_EEPROM_WP));
+ C
ONFIG_SYS
_EEPROM_WP));
break;
}
}
break;
}
}
@@
-298,21
+298,21
@@
int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (query) {
/* Query write access state. */
if (query) {
/* Query write access state. */
- state = eeprom_write_enable (C
FG
_I2C_EEPROM_ADDR, -1);
+ state = eeprom_write_enable (C
ONFIG_SYS
_I2C_EEPROM_ADDR, -1);
if (state < 0) {
puts ("Query of write access state failed.\n");
} else {
printf ("Write access for device 0x%0x is %sabled.\n",
if (state < 0) {
puts ("Query of write access state failed.\n");
} else {
printf ("Write access for device 0x%0x is %sabled.\n",
- C
FG
_I2C_EEPROM_ADDR, state ? "en" : "dis");
+ C
ONFIG_SYS
_I2C_EEPROM_ADDR, state ? "en" : "dis");
state = 0;
}
} else {
if ('0' == argv[1][0]) {
/* Disable write access. */
state = 0;
}
} else {
if ('0' == argv[1][0]) {
/* Disable write access. */
- state = eeprom_write_enable (C
FG
_I2C_EEPROM_ADDR, 0);
+ state = eeprom_write_enable (C
ONFIG_SYS
_I2C_EEPROM_ADDR, 0);
} else {
/* Enable write access. */
} else {
/* Enable write access. */
- state = eeprom_write_enable (C
FG
_I2C_EEPROM_ADDR, 1);
+ state = eeprom_write_enable (C
ONFIG_SYS
_I2C_EEPROM_ADDR, 1);
}
if (state < 0) {
puts ("Setup of write access state failed.\n");
}
if (state < 0) {
puts ("Setup of write access state failed.\n");
@@
-325,4
+325,4
@@
int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"eepwren - Enable / disable / query EEPROM write access\n",
NULL);
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"eepwren - Enable / disable / query EEPROM write access\n",
NULL);
-#endif /* #if defined(C
FG
_EEPROM_WREN) */
+#endif /* #if defined(C
ONFIG_SYS
_EEPROM_WREN) */