+#if defined(CONFIG_PCI)
+void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+ unsigned char int_line = 0xff;
+
+ /*
+ * Write pci interrupt line register (cpci405 specific)
+ */
+ switch (PCI_DEV(dev) & 0x03) {
+ case 0:
+ int_line = 27 + 2;
+ break;
+ case 1:
+ int_line = 27 + 3;
+ break;
+ case 2:
+ int_line = 27 + 0;
+ break;
+ case 3:
+ int_line = 27 + 1;
+ break;
+ }
+
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
+}
+
+int pci_pre_init(struct pci_controller *hose)
+{
+ hose->fixup_irq = cpci405_pci_fixup_irq;
+ return 1;
+}
+#endif /* defined(CONFIG_PCI) */
+
+
+#ifdef CONFIG_CPCI405AB
+
+#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+ |= CFG_FPGA_MODE_1WIRE_DIR)
+#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+ &= ~CFG_FPGA_MODE_1WIRE_DIR)
+#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
+ & CFG_FPGA_MODE_1WIRE)
+
+/*
+ * Generate a 1-wire reset, return 1 if no presence detect was found,
+ * return 0 otherwise.
+ * (NOTE: Does not handle alarm presence from DS2404/DS1994)
+ */
+int OWTouchReset(void)
+{
+ int result;
+
+ ONE_WIRE_CLEAR;
+ udelay(480);
+ ONE_WIRE_SET;
+ udelay(70);
+
+ result = ONE_WIRE_GET;
+
+ udelay(410);
+ return result;
+}
+
+/*
+ * Send 1 a 1-wire write bit.
+ * Provide 10us recovery time.
+ */
+void OWWriteBit(int bit)
+{
+ if (bit) {
+ /*
+ * write '1' bit
+ */
+ ONE_WIRE_CLEAR;
+ udelay(6);
+ ONE_WIRE_SET;
+ udelay(64);
+ } else {
+ /*
+ * write '0' bit
+ */
+ ONE_WIRE_CLEAR;
+ udelay(60);
+ ONE_WIRE_SET;
+ udelay(10);
+ }
+}
+
+/*
+ * Read a bit from the 1-wire bus and return it.
+ * Provide 10us recovery time.
+ */
+int OWReadBit(void)
+{
+ int result;
+
+ ONE_WIRE_CLEAR;
+ udelay(6);
+ ONE_WIRE_SET;
+ udelay(9);
+
+ result = ONE_WIRE_GET;
+
+ udelay(55);
+ return result;
+}
+
+void OWWriteByte(int data)
+{
+ int loop;
+
+ for (loop=0; loop<8; loop++) {
+ OWWriteBit(data & 0x01);
+ data >>= 1;
+ }
+}
+
+int OWReadByte(void)
+{
+ int loop, result = 0;
+
+ for (loop=0; loop<8; loop++) {
+ result >>= 1;
+ if (OWReadBit()) {
+ result |= 0x80;
+ }
+ }
+
+ return result;
+}
+
+int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ volatile unsigned short val;
+ int result;
+ int i;
+ unsigned char ow_id[6];
+ char str[32];
+ unsigned char ow_crc;
+
+ /*
+ * Clear 1-wire bit (open drain with pull-up)
+ */
+ val = *(volatile unsigned short *)0xf0400000;
+ val &= ~0x1000; /* clear 1-wire bit */
+ *(volatile unsigned short *)0xf0400000 = val;
+
+ result = OWTouchReset();
+ if (result != 0) {
+ puts("No 1-wire device detected!\n");
+ }
+
+ OWWriteByte(0x33); /* send read rom command */
+ OWReadByte(); /* skip family code ( == 0x01) */
+ for (i=0; i<6; i++) {
+ ow_id[i] = OWReadByte();
+ }
+ ow_crc = OWReadByte(); /* read crc */
+
+ sprintf(str, "%08X%04X", *(unsigned int *)&ow_id[0], *(unsigned short *)&ow_id[4]);
+ printf("Setting environment variable 'ow_id' to %s\n", str);
+ setenv("ow_id", str);
+
+ return 0;
+}
+U_BOOT_CMD(
+ onewire, 1, 1, do_onewire,
+ "onewire - Read 1-write ID\n",
+ NULL
+ );
+
+#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
+#define CONFIG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/
+
+/*
+ * Write backplane ip-address...
+ */
+int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ bd_t *bd = gd->bd;
+ char *buf;
+ ulong crc;
+ char str[32];
+ char *ptr;
+ IPaddr_t ipaddr;
+
+ buf = malloc(CONFIG_ENV_SIZE_2);
+ if (eeprom_read(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) {
+ puts("\nError reading backplane EEPROM!\n");
+ } else {
+ crc = crc32(0, (uchar *)(buf+4), CONFIG_ENV_SIZE_2-4);
+ if (crc != *(ulong *)buf) {
+ printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(ulong *)buf);
+ return -1;
+ }
+
+ /*
+ * Find bp_ip
+ */
+ ptr = strstr(buf+4, "bp_ip=");
+ if (ptr == NULL) {
+ printf("ERROR: bp_ip not found!\n");
+ return -1;
+ }
+ ptr += 6;
+ ipaddr = string_to_ip(ptr);
+
+ /*
+ * Update whole ip-addr
+ */
+ bd->bi_ip_addr = ipaddr;
+ sprintf(str, "%ld.%ld.%ld.%ld",
+ (bd->bi_ip_addr & 0xff000000) >> 24,
+ (bd->bi_ip_addr & 0x00ff0000) >> 16,
+ (bd->bi_ip_addr & 0x0000ff00) >> 8,
+ (bd->bi_ip_addr & 0x000000ff));
+ setenv("ipaddr", str);
+ printf("Updated ip_addr from bp_eeprom to %s!\n", str);
+ }
+
+ free(buf);
+
+ return 0;
+}
+U_BOOT_CMD(
+ getbpip, 1, 1, do_get_bpip,
+ "getbpip - Update IP-Address with Backplane IP-Address\n",
+ NULL
+ );
+
+/*
+ * Set and print backplane ip...
+ */
+int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ char *buf;
+ char str[32];
+ ulong crc;
+
+ if (argc < 2) {
+ puts("ERROR!\n");
+ return -1;
+ }
+
+ printf("Setting bp_ip to %s\n", argv[1]);
+ buf = malloc(CONFIG_ENV_SIZE_2);
+ memset(buf, 0, CONFIG_ENV_SIZE_2);
+ sprintf(str, "bp_ip=%s", argv[1]);
+ strcpy(buf+4, str);
+ crc = crc32(0, (uchar *)(buf+4), CONFIG_ENV_SIZE_2-4);
+ *(ulong *)buf = crc;
+
+ if (eeprom_write(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) {
+ puts("\nError writing backplane EEPROM!\n");
+ }
+
+ free(buf);
+
+ return 0;
+}
+U_BOOT_CMD(
+ setbpip, 2, 1, do_set_bpip,
+ "setbpip - Write Backplane IP-Address\n",
+ NULL
+ );
+
+#endif /* CONFIG_CPCI405AB */