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rename CFG_ macros to CONFIG_SYS
[platform/kernel/u-boot.git]
/
board
/
RRvision
/
RRvision.c
diff --git
a/board/RRvision/RRvision.c
b/board/RRvision/RRvision.c
index
c0b772d
..
9d016c5
100644
(file)
--- a/
board/RRvision/RRvision.c
+++ b/
board/RRvision/RRvision.c
@@
-112,7
+112,7
@@
int checkboard (void)
phys_size_t initdram (int board_type)
{
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) C
FG
_IMMR;
+ volatile immap_t *immap = (immap_t *) C
ONFIG_SYS
_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long reg;
long int size8, size9;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long reg;
long int size8, size9;
@@
-126,17
+126,17
@@
phys_size_t initdram (int board_type)
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
- memctl->memc_mptpr = C
FG
_MPTPR_2BK_8K;
+ memctl->memc_mptpr = C
ONFIG_SYS
_MPTPR_2BK_8K;
memctl->memc_mar = 0x00000088;
/*
* Map controller bank 1 the SDRAM bank 2 at physical address 0.
*/
memctl->memc_mar = 0x00000088;
/*
* Map controller bank 1 the SDRAM bank 2 at physical address 0.
*/
- memctl->memc_or1 = C
FG
_OR2_PRELIM;
- memctl->memc_br1 = C
FG
_BR2_PRELIM;
+ memctl->memc_or1 = C
ONFIG_SYS
_OR2_PRELIM;
+ memctl->memc_br1 = C
ONFIG_SYS
_BR2_PRELIM;
- memctl->memc_mamr = C
FG_MAMR_8COL & (~(MAMR_PTAE));
/* no refresh yet */
+ memctl->memc_mamr = C
ONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE));
/* no refresh yet */
udelay (200);
udelay (200);
@@
-156,7
+156,7
@@
phys_size_t initdram (int board_type)
*
* try 8 column mode
*/
*
* try 8 column mode
*/
- size8 = dram_size (C
FG
_MAMR_8COL,
+ size8 = dram_size (C
ONFIG_SYS
_MAMR_8COL,
SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
@@
-165,7
+165,7
@@
phys_size_t initdram (int board_type)
/*
* try 9 column mode
*/
/*
* try 9 column mode
*/
- size9 = dram_size (C
FG
_MAMR_9COL,
+ size9 = dram_size (C
ONFIG_SYS
_MAMR_9COL,
SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
@@
-174,7
+174,7
@@
phys_size_t initdram (int board_type)
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
size = size8;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
size = size8;
- memctl->memc_mamr = C
FG
_MAMR_8COL;
+ memctl->memc_mamr = C
ONFIG_SYS
_MAMR_8COL;
udelay (500);
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
}
udelay (500);
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
}
@@
-187,15
+187,15
@@
phys_size_t initdram (int board_type)
*/
if (size < 0x02000000) {
/* reduce to 15.6 us (62.4 us / quad) */
*/
if (size < 0x02000000) {
/* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = C
FG
_MPTPR_2BK_4K;
+ memctl->memc_mptpr = C
ONFIG_SYS
_MPTPR_2BK_4K;
udelay (1000);
}
/*
* Final mapping
*/
udelay (1000);
}
/*
* Final mapping
*/
- memctl->memc_or1 = ((-size) & 0xFFFF0000) | C
FG
_OR_TIMING_SDRAM;
- memctl->memc_br1 = (C
FG
_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+ memctl->memc_or1 = ((-size) & 0xFFFF0000) | C
ONFIG_SYS
_OR_TIMING_SDRAM;
+ memctl->memc_br1 = (C
ONFIG_SYS
_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
/*
* No bank 1
/*
* No bank 1
@@
-206,7
+206,7
@@
phys_size_t initdram (int board_type)
/* adjust refresh rate depending on SDRAM type, one bank */
reg = memctl->memc_mptpr;
/* adjust refresh rate depending on SDRAM type, one bank */
reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to C
FG
_MPTPR_1BK_8K / _4K */
+ reg >>= 1; /* reduce to C
ONFIG_SYS
_MPTPR_1BK_8K / _4K */
memctl->memc_mptpr = reg;
udelay (10000);
memctl->memc_mptpr = reg;
udelay (10000);
@@
-227,7
+227,7
@@
phys_size_t initdram (int board_type)
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
- volatile immap_t *immap = (immap_t *) C
FG
_IMMR;
+ volatile immap_t *immap = (immap_t *) C
ONFIG_SYS
_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mamr = mamr_value;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mamr = mamr_value;