-/* Number of TLB CAM entries we have on FSL Book-E chips */
-#if defined(CONFIG_E500MC)
-#define CONFIG_SYS_NUM_TLBCAMS 64
-#elif defined(CONFIG_E500)
-#define CONFIG_SYS_NUM_TLBCAMS 16
-#endif
-
-#if defined(CONFIG_ARCH_MPC8536)
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB 1
-#define CONFIG_SYS_FSL_SEC_COMPAT 2
-#define CONFIG_SYS_FSL_ERRATUM_A004508
-#define CONFIG_SYS_FSL_ERRATUM_A005125
-
-#elif defined(CONFIG_ARCH_MPC8540)
-#define CONFIG_SYS_FSL_DDRC_GEN1
-
-#elif defined(CONFIG_ARCH_MPC8541)
-#define CONFIG_SYS_FSL_DDRC_GEN1
-#define CONFIG_SYS_FSL_SEC_COMPAT 2
-
-#elif defined(CONFIG_ARCH_MPC8544)
-#define CONFIG_SYS_FSL_DDRC_GEN2
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB 0
-#define CONFIG_SYS_FSL_SEC_COMPAT 2
-#define CONFIG_SYS_FSL_ERRATUM_A005125
-
-#elif defined(CONFIG_ARCH_MPC8548)
-#define CONFIG_SYS_FSL_DDRC_GEN2
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB 0
-#define CONFIG_SYS_FSL_SEC_COMPAT 2
-#define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
-#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
-#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129