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Merge git://git.denx.de/u-boot-mpc85xx
[platform/kernel/u-boot.git]
/
arch
/
powerpc
/
cpu
/
mpc85xx
/
fsl_corenet_serdes.c
diff --git
a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index
ba22f90
..
1bc0c64
100644
(file)
--- a/
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@
-13,7
+13,7
@@
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fsl_law.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fsl_law.h>
-#include <
asm
/errno.h>
+#include <
linux
/errno.h>
#include "fsl_corenet_serdes.h"
/*
#include "fsl_corenet_serdes.h"
/*
@@
-76,7
+76,7
@@
static const struct {
{ 17, 163, FSL_SRDS_BANK_2 },
{ 18, 164, FSL_SRDS_BANK_2 },
{ 19, 165, FSL_SRDS_BANK_2 },
{ 17, 163, FSL_SRDS_BANK_2 },
{ 18, 164, FSL_SRDS_BANK_2 },
{ 19, 165, FSL_SRDS_BANK_2 },
-#ifdef CONFIG_
PPC
_P4080
+#ifdef CONFIG_
ARCH
_P4080
{ 20, 170, FSL_SRDS_BANK_3 },
{ 21, 171, FSL_SRDS_BANK_3 },
{ 22, 172, FSL_SRDS_BANK_3 },
{ 20, 170, FSL_SRDS_BANK_3 },
{ 21, 171, FSL_SRDS_BANK_3 },
{ 22, 172, FSL_SRDS_BANK_3 },
@@
-136,6
+136,9
@@
int is_serdes_configured(enum srds_prtcl device)
if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
return 0;
if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
return 0;
+ if (!(serdes_prtcl_map & (1 << NONE)))
+ fsl_serdes_init();
+
return (1 << device) & serdes_prtcl_map;
}
return (1 << device) & serdes_prtcl_map;
}
@@
-488,7
+491,7
@@
void fsl_serdes_init(void)
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int cfg;
serdes_corenet_t *srds_regs;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int cfg;
serdes_corenet_t *srds_regs;
-#ifdef CONFIG_
PPC
_P5040
+#ifdef CONFIG_
ARCH
_P5040
serdes_corenet_t *srds2_regs;
#endif
int lane, bank, idx;
serdes_corenet_t *srds2_regs;
#endif
int lane, bank, idx;
@@
-514,6
+517,8
@@
void fsl_serdes_init(void)
if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#endif
if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#endif
+ if (serdes_prtcl_map & (1 << NONE))
+ return;
/* Is serdes enabled at all? */
if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
/* Is serdes enabled at all? */
if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
@@
-572,7
+577,7
@@
void fsl_serdes_init(void)
}
}
}
}
-#ifdef CONFIG_
PPC
_P5040
+#ifdef CONFIG_
ARCH
_P5040
/*
* Lanes on bank 4 on P5040 are commented-out, but for some SERDES
* protocols, these lanes are routed to SATA. We use serdes_prtcl_map
/*
* Lanes on bank 4 on P5040 are commented-out, but for some SERDES
* protocols, these lanes are routed to SATA. We use serdes_prtcl_map
@@
-602,6
+607,9
@@
void fsl_serdes_init(void)
soc_serdes_init();
soc_serdes_init();
+ /* Set the first bit to indicate serdes has been initialized */
+ serdes_prtcl_map |= (1 << NONE);
+
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
/*
* Bank two uses the clock from bank three, so if bank two is enabled,
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
/*
* Bank two uses the clock from bank three, so if bank two is enabled,