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fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
[platform/kernel/u-boot.git]
/
arch
/
powerpc
/
cpu
/
mpc85xx
/
cpu_init.c
diff --git
a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index
1d016c4
..
354b222
100644
(file)
--- a/
arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/
arch/powerpc/cpu/mpc85xx/cpu_init.c
@@
-394,6
+394,14
@@
int cpu_init_r(void)
setup_mp();
#endif
setup_mp();
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC136
+ {
+ void *p;
+ p = (void *)CONFIG_SYS_DCSRBAR + 0x20520;
+ setbits_be32(p, 1 << (31 - 14));
+ }
+#endif
+
#ifdef CONFIG_SYS_LBC_LCRR
/*
* Modify the CLKDIV field of LCRR register to improve the writing
#ifdef CONFIG_SYS_LBC_LCRR
/*
* Modify the CLKDIV field of LCRR register to improve the writing