Move CONFIG_PANIC_HANG to Kconfig

[platform/kernel/u-boot.git] / arch / powerpc / cpu / mpc85xx / Kconfig

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 307a45d..19e8d02 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -4,6 +4,14 @@ menu "mpc85xx CPU"
 config SYS_CPU
        default "mpc85xx"
 
 config SYS_CPU
        default "mpc85xx"
 

+config CMD_ERRATA
+       bool "Enable the 'errata' command"
+       depends on MPC85xx
+       default y
+       help
+         This enables the 'errata' command which displays a list of errata
+         work-arounds which are enabled for the current board.
+

 choice
        prompt "Target select"
        optional
 choice
        prompt "Target select"
        optional


@@ -21,59 +29,77 @@ config TARGET_B4420QDS
        select ARCH_B4420
        select SUPPORT_SPL
        select PHYS_64BIT
        select ARCH_B4420
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply PANIC_HANG

 
 config TARGET_B4860QDS
        bool "Support B4860QDS"
        select ARCH_B4860
 
 config TARGET_B4860QDS
        bool "Support B4860QDS"
        select ARCH_B4860

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply PANIC_HANG

 
 config TARGET_BSC9131RDB
        bool "Support BSC9131RDB"
        select ARCH_BSC9131
        select SUPPORT_SPL
 
 config TARGET_BSC9131RDB
        bool "Support BSC9131RDB"
        select ARCH_BSC9131
        select SUPPORT_SPL

+       select BOARD_EARLY_INIT_F

 
 config TARGET_BSC9132QDS
        bool "Support BSC9132QDS"
        select ARCH_BSC9132
 
 config TARGET_BSC9132QDS
        bool "Support BSC9132QDS"
        select ARCH_BSC9132

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select SUPPORT_SPL

+       select BOARD_EARLY_INIT_F

 
 config TARGET_C29XPCIE
        bool "Support C29XPCIE"
        select ARCH_C29X
 
 config TARGET_C29XPCIE
        bool "Support C29XPCIE"
        select ARCH_C29X

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select SUPPORT_TPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select SUPPORT_TPL
        select PHYS_64BIT

+       imply PANIC_HANG

 
 config TARGET_P3041DS
        bool "Support P3041DS"
        select PHYS_64BIT
        select ARCH_P3041
 
 config TARGET_P3041DS
        bool "Support P3041DS"
        select PHYS_64BIT
        select ARCH_P3041

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P4080DS
        bool "Support P4080DS"
        select PHYS_64BIT
        select ARCH_P4080
 
 config TARGET_P4080DS
        bool "Support P4080DS"
        select PHYS_64BIT
        select ARCH_P4080

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P5020DS
        bool "Support P5020DS"
        select PHYS_64BIT
        select ARCH_P5020
 
 config TARGET_P5020DS
        bool "Support P5020DS"
        select PHYS_64BIT
        select ARCH_P5020

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P5040DS
        bool "Support P5040DS"
        select PHYS_64BIT
        select ARCH_P5040
 
 config TARGET_P5040DS
        bool "Support P5040DS"
        select PHYS_64BIT
        select ARCH_P5040

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_MPC8536DS
        bool "Support MPC8536DS"
        select ARCH_MPC8536
 # Use DDR3 controller with DDR2 DIMMs on this board
        select SYS_FSL_DDRC_GEN3
 
 config TARGET_MPC8536DS
        bool "Support MPC8536DS"
        select ARCH_MPC8536
 # Use DDR3 controller with DDR2 DIMMs on this board
        select SYS_FSL_DDRC_GEN3

-
-config TARGET_MPC8540ADS
-       bool "Support MPC8540ADS"
-       select ARCH_MPC8540
+       imply CMD_SATA
+       imply FSL_SATA

 
 config TARGET_MPC8541CDS
        bool "Support MPC8541CDS"
 
 config TARGET_MPC8541CDS
        bool "Support MPC8541CDS"


@@ -82,6 +108,7 @@ config TARGET_MPC8541CDS
 config TARGET_MPC8544DS
        bool "Support MPC8544DS"
        select ARCH_MPC8544
 config TARGET_MPC8544DS
        bool "Support MPC8544DS"
        select ARCH_MPC8544

+       imply PANIC_HANG

 
 config TARGET_MPC8548CDS
        bool "Support MPC8548CDS"
 
 config TARGET_MPC8548CDS
        bool "Support MPC8548CDS"


@@ -91,10 +118,6 @@ config TARGET_MPC8555CDS
        bool "Support MPC8555CDS"
        select ARCH_MPC8555
 
        bool "Support MPC8555CDS"
        select ARCH_MPC8555
 

-config TARGET_MPC8560ADS
-       bool "Support MPC8560ADS"
-       select ARCH_MPC8560
-

 config TARGET_MPC8568MDS
        bool "Support MPC8568MDS"
        select ARCH_MPC8568
 config TARGET_MPC8568MDS
        bool "Support MPC8568MDS"
        select ARCH_MPC8568


@@ -108,76 +131,114 @@ config TARGET_MPC8572DS
        select ARCH_MPC8572
 # Use DDR3 controller with DDR2 DIMMs on this board
        select SYS_FSL_DDRC_GEN3
        select ARCH_MPC8572
 # Use DDR3 controller with DDR2 DIMMs on this board
        select SYS_FSL_DDRC_GEN3

+       imply SCSI
+       imply PANIC_HANG

 
 config TARGET_P1010RDB_PA
        bool "Support P1010RDB_PA"
        select ARCH_P1010
 
 config TARGET_P1010RDB_PA
        bool "Support P1010RDB_PA"
        select ARCH_P1010

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select SUPPORT_TPL
        select SUPPORT_SPL
        select SUPPORT_TPL

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1010RDB_PB
        bool "Support P1010RDB_PB"
        select ARCH_P1010
 
 config TARGET_P1010RDB_PB
        bool "Support P1010RDB_PB"
        select ARCH_P1010

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select SUPPORT_TPL
        select SUPPORT_SPL
        select SUPPORT_TPL

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1022DS
        bool "Support P1022DS"
        select ARCH_P1022
        select SUPPORT_SPL
        select SUPPORT_TPL
 
 config TARGET_P1022DS
        bool "Support P1022DS"
        select ARCH_P1022
        select SUPPORT_SPL
        select SUPPORT_TPL

+       imply CMD_SATA
+       imply FSL_SATA

 
 config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023
 
 config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023

+       imply CMD_EEPROM
+       imply PANIC_HANG

 
 config TARGET_P1020MBG
        bool "Support P1020MBG-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020
 
 config TARGET_P1020MBG
        bool "Support P1020MBG-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1020RDB_PC
        bool "Support P1020RDB-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020
 
 config TARGET_P1020RDB_PC
        bool "Support P1020RDB-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1020RDB_PD
        bool "Support P1020RDB-PD"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020
 
 config TARGET_P1020RDB_PD
        bool "Support P1020RDB-PD"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1020UTM
        bool "Support P1020UTM"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020
 
 config TARGET_P1020UTM
        bool "Support P1020UTM"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1020

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1021RDB
        bool "Support P1021RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1021
 
 config TARGET_P1021RDB
        bool "Support P1021RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1021

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1024RDB
        bool "Support P1024RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1024
 
 config TARGET_P1024RDB
        bool "Support P1024RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1024

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_P1025RDB
        bool "Support P1025RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1025
 
 config TARGET_P1025RDB
        bool "Support P1025RDB"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P1025

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply SATA_SIL

 
 config TARGET_P2020RDB
        bool "Support P2020RDB-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P2020
 
 config TARGET_P2020RDB
        bool "Support P2020RDB-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
        select ARCH_P2020

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply SATA_SIL

 
 config TARGET_P1_TWR
        bool "Support p1_twr"
 
 config TARGET_P1_TWR
        bool "Support p1_twr"


@@ -186,7 +247,10 @@ config TARGET_P1_TWR
 config TARGET_P2041RDB
        bool "Support P2041RDB"
        select ARCH_P2041
 config TARGET_P2041RDB
        bool "Support P2041RDB"
        select ARCH_P2041

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select PHYS_64BIT
        select PHYS_64BIT

+       imply CMD_SATA
+       imply FSL_SATA

 
 config TARGET_QEMU_PPCE500
        bool "Support qemu-ppce500"
 
 config TARGET_QEMU_PPCE500
        bool "Support qemu-ppce500"


@@ -196,67 +260,100 @@ config TARGET_QEMU_PPCE500
 config TARGET_T1024QDS
        bool "Support T1024QDS"
        select ARCH_T1024
 config TARGET_T1024QDS
        bool "Support T1024QDS"
        select ARCH_T1024

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply FSL_SATA

 
 config TARGET_T1023RDB
        bool "Support T1023RDB"
        select ARCH_T1023
 
 config TARGET_T1023RDB
        bool "Support T1023RDB"
        select ARCH_T1023

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_EEPROM
+       imply PANIC_HANG

 
 config TARGET_T1024RDB
        bool "Support T1024RDB"
        select ARCH_T1024
 
 config TARGET_T1024RDB
        bool "Support T1024RDB"
        select ARCH_T1024

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_EEPROM
+       imply PANIC_HANG

 
 config TARGET_T1040QDS
        bool "Support T1040QDS"
        select ARCH_T1040
 
 config TARGET_T1040QDS
        bool "Support T1040QDS"
        select ARCH_T1040

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select PHYS_64BIT
        select PHYS_64BIT

+       imply CMD_EEPROM
+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T1040RDB
        bool "Support T1040RDB"
        select ARCH_T1040
 
 config TARGET_T1040RDB
        bool "Support T1040RDB"
        select ARCH_T1040

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T1040D4RDB
        bool "Support T1040D4RDB"
        select ARCH_T1040
 
 config TARGET_T1040D4RDB
        bool "Support T1040D4RDB"
        select ARCH_T1040

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T1042RDB
        bool "Support T1042RDB"
        select ARCH_T1042
 
 config TARGET_T1042RDB
        bool "Support T1042RDB"
        select ARCH_T1042

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA

 
 config TARGET_T1042D4RDB
        bool "Support T1042D4RDB"
        select ARCH_T1042
 
 config TARGET_T1042D4RDB
        bool "Support T1042D4RDB"
        select ARCH_T1042

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T1042RDB_PI
        bool "Support T1042RDB_PI"
        select ARCH_T1042
 
 config TARGET_T1042RDB_PI
        bool "Support T1042RDB_PI"
        select ARCH_T1042

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T2080QDS
        bool "Support T2080QDS"
        select ARCH_T2080
 
 config TARGET_T2080QDS
        bool "Support T2080QDS"
        select ARCH_T2080

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA

 
 config TARGET_T2080RDB
        bool "Support T2080RDB"
        select ARCH_T2080
 
 config TARGET_T2080RDB
        bool "Support T2080RDB"
        select ARCH_T2080

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T2081QDS
        bool "Support T2081QDS"
 
 config TARGET_T2081QDS
        bool "Support T2081QDS"


@@ -267,26 +364,35 @@ config TARGET_T2081QDS
 config TARGET_T4160QDS
        bool "Support T4160QDS"
        select ARCH_T4160
 config TARGET_T4160QDS
        bool "Support T4160QDS"
        select ARCH_T4160

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T4160RDB
        bool "Support T4160RDB"
        select ARCH_T4160
        select SUPPORT_SPL
        select PHYS_64BIT
 
 config TARGET_T4160RDB
        bool "Support T4160RDB"
        select ARCH_T4160
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply PANIC_HANG

 
 config TARGET_T4240QDS
        bool "Support T4240QDS"
        select ARCH_T4240
 
 config TARGET_T4240QDS
        bool "Support T4240QDS"
        select ARCH_T4240

+       select BOARD_LATE_INIT if CHAIN_OF_TRUST

        select SUPPORT_SPL
        select PHYS_64BIT
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_T4240RDB
        bool "Support T4240RDB"
        select ARCH_T4240
        select SUPPORT_SPL
        select PHYS_64BIT
 
 config TARGET_T4240RDB
        bool "Support T4240RDB"
        select ARCH_T4240
        select SUPPORT_SPL
        select PHYS_64BIT

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_CONTROLCENTERD
        bool "Support controlcenterd"
 
 config TARGET_CONTROLCENTERD
        bool "Support controlcenterd"


@@ -296,6 +402,8 @@ config TARGET_KMP204X
        bool "Support kmp204x"
        select ARCH_P2041
        select PHYS_64BIT
        bool "Support kmp204x"
        select ARCH_P2041
        select PHYS_64BIT

+       imply CMD_CRAMFS
+       imply FS_CRAMFS

 
 config TARGET_XPEDITE520X
        bool "Support xpedite520x"
 
 config TARGET_XPEDITE520X
        bool "Support xpedite520x"


@@ -314,72 +422,147 @@ config TARGET_XPEDITE550X
 config TARGET_UCP1020
        bool "Support uCP1020"
        select ARCH_P1020
 config TARGET_UCP1020
        bool "Support uCP1020"
        select ARCH_P1020

+       imply CMD_SATA
+       imply PANIC_HANG

 
 config TARGET_CYRUS_P5020
        bool "Support Varisys Cyrus P5020"
        select ARCH_P5020
        select PHYS_64BIT
 
 config TARGET_CYRUS_P5020
        bool "Support Varisys Cyrus P5020"
        select ARCH_P5020
        select PHYS_64BIT

+       imply PANIC_HANG

 
 config TARGET_CYRUS_P5040
         bool "Support Varisys Cyrus P5040"
        select ARCH_P5040
        select PHYS_64BIT
 
 config TARGET_CYRUS_P5040
         bool "Support Varisys Cyrus P5040"
        select ARCH_P5040
        select PHYS_64BIT

+       imply PANIC_HANG

 
 endchoice
 
 config ARCH_B4420
        bool
        select E500MC
 
 endchoice
 
 config ARCH_B4420
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A005871
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006384
+       select SYS_FSL_ERRATUM_A006475
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007075
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A009942

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_B4860
        bool
        select E500MC
 
 config ARCH_B4860
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A005871
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006384
+       select SYS_FSL_ERRATUM_A006475
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007075
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A007907
+       select SYS_FSL_ERRATUM_A009942

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_BSC9131
        bool
        select FSL_LAW
 
 config ARCH_BSC9131
        bool
        select FSL_LAW

+       select SYS_FSL_DDR_VER_44
+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_BSC9132
        bool
        select FSL_LAW
 
 config ARCH_BSC9132
        bool
        select FSL_LAW

+       select SYS_FSL_DDR_VER_46
+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_A005434
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_IFC_A002769

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_MTDPARTS
+       imply CMD_NAND
+       imply CMD_PCI
+       imply CMD_REGINFO

 
 config ARCH_C29X
        bool
        select FSL_LAW
 
 config ARCH_C29X
        bool
        select FSL_LAW

+       select SYS_FSL_DDR_VER_46
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_6
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_6
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_IFC
+       imply CMD_NAND
+       imply CMD_PCI
+       imply CMD_REGINFO

 
 config ARCH_MPC8536
        bool
        select FSL_LAW
 
 config ARCH_MPC8536
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125

        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_REGINFO

 
 config ARCH_MPC8540
        bool
 
 config ARCH_MPC8540
        bool


@@ -397,21 +580,29 @@ config ARCH_MPC8541
 config ARCH_MPC8544
        bool
        select FSL_LAW
 config ARCH_MPC8544
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A005125

        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC

 
 config ARCH_MPC8548
        bool
        select FSL_LAW
 
 config ARCH_MPC8548
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_NMG_DDR120
+       select SYS_FSL_ERRATUM_NMG_LBC103
+       select SYS_FSL_ERRATUM_NMG_ETSEC129
+       select SYS_FSL_ERRATUM_I2C_A004447

        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       imply CMD_REGINFO

 
 config ARCH_MPC8555
        bool
 
 config ARCH_MPC8555
        bool


@@ -437,145 +628,329 @@ config ARCH_MPC8568
 config ARCH_MPC8569
        bool
        select FSL_LAW
 config ARCH_MPC8569
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2

+       select FSL_ELBC
+       imply CMD_NAND

 
 config ARCH_MPC8572
        bool
        select FSL_LAW
 
 config ARCH_MPC8572
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_DDR_115
+       select SYS_FSL_ERRATUM_DDR111_DDR134

        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_NAND

 
 config ARCH_P1010
        bool
        select FSL_LAW
 
 config ARCH_P1010
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_A007075
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_IFC_A002769
+       select SYS_FSL_ERRATUM_P1010_A003549
+       select SYS_FSL_ERRATUM_SEC_A003571
+       select SYS_FSL_ERRATUM_IFC_A003399

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_MTDPARTS
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_PCI
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_P1011
        bool
        select FSL_LAW
 
 config ARCH_P1011
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC

 
 config ARCH_P1020
        bool
        select FSL_LAW
 
 config ARCH_P1020
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_PCI
+       imply CMD_REGINFO
+       imply SATA_SIL

 
 config ARCH_P1021
        bool
        select FSL_LAW
 
 config ARCH_P1021
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_REGINFO
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply SATA_SIL

 
 config ARCH_P1022
        bool
        select FSL_LAW
 
 config ARCH_P1022
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_SATA_A001

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC

 
 config ARCH_P1023
        bool
        select FSL_LAW
 
 config ARCH_P1023
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_I2C_A004447

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select FSL_ELBC

 
 config ARCH_P1024
        bool
        select FSL_LAW
 
 config ARCH_P1024
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_PCI
+       imply CMD_REGINFO
+       imply SATA_SIL

 
 config ARCH_P1025
        bool
        select FSL_LAW
 
 config ARCH_P1025
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_SATA
+       imply CMD_REGINFO

 
 config ARCH_P2020
        bool
        select FSL_LAW
 
 config ARCH_P2020
        bool
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004477
+       select SYS_FSL_ERRATUM_A004508
+       select SYS_FSL_ERRATUM_A005125
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC_A001

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
        select SYS_PPC_E500_USE_DEBUG_TLB

+       select FSL_ELBC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_P2041
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_P2041
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_ERRATUM_A004510
+       select SYS_FSL_ERRATUM_A004849
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_CPU_A003999
+       select SYS_FSL_ERRATUM_DDR_A003
+       select SYS_FSL_ERRATUM_DDR_A003474
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_NMG_CPU_A011
+       select SYS_FSL_ERRATUM_SRIO_A004034
+       select SYS_FSL_ERRATUM_USB14

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS1

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select FSL_ELBC
+       imply CMD_NAND

 
 config ARCH_P3041
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_P3041
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_44
+       select SYS_FSL_ERRATUM_A004510
+       select SYS_FSL_ERRATUM_A004849
+       select SYS_FSL_ERRATUM_A005812
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_CPU_A003999
+       select SYS_FSL_ERRATUM_DDR_A003
+       select SYS_FSL_ERRATUM_DDR_A003474
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_NMG_CPU_A011
+       select SYS_FSL_ERRATUM_SRIO_A004034
+       select SYS_FSL_ERRATUM_USB14

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS1

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select FSL_ELBC
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_P4080
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_P4080
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_44
+       select SYS_FSL_ERRATUM_A004510
+       select SYS_FSL_ERRATUM_A004580
+       select SYS_FSL_ERRATUM_A004849
+       select SYS_FSL_ERRATUM_A005812
+       select SYS_FSL_ERRATUM_A007075
+       select SYS_FSL_ERRATUM_CPC_A002
+       select SYS_FSL_ERRATUM_CPC_A003
+       select SYS_FSL_ERRATUM_CPU_A003999
+       select SYS_FSL_ERRATUM_DDR_A003
+       select SYS_FSL_ERRATUM_DDR_A003474
+       select SYS_FSL_ERRATUM_ELBC_A001
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC13
+       select SYS_FSL_ERRATUM_ESDHC135
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_NMG_CPU_A011
+       select SYS_FSL_ERRATUM_SRIO_A004034
+       select SYS_P4080_ERRATUM_CPU22
+       select SYS_P4080_ERRATUM_PCIE_A003
+       select SYS_P4080_ERRATUM_SERDES8
+       select SYS_P4080_ERRATUM_SERDES9
+       select SYS_P4080_ERRATUM_SERDES_A001
+       select SYS_P4080_ERRATUM_SERDES_A005

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS1

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select FSL_ELBC
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply SATA_SIL

 
 config ARCH_P5020
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_P5020
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_44
+       select SYS_FSL_ERRATUM_A004510
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_DDR_A003
+       select SYS_FSL_ERRATUM_DDR_A003474
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_I2C_A004447
+       select SYS_FSL_ERRATUM_SRIO_A004034
+       select SYS_FSL_ERRATUM_USB14

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS1

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_ELBC
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_P5040
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_P5040
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_44
+       select SYS_FSL_ERRATUM_A004510
+       select SYS_FSL_ERRATUM_A004699
+       select SYS_FSL_ERRATUM_A005812
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_DDR_A003
+       select SYS_FSL_ERRATUM_DDR_A003474
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_USB14

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS1

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_ELBC
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_QEMU_E500
        bool
 
 config ARCH_QEMU_E500
        bool


@@ -584,77 +959,189 @@ config ARCH_T1023
        bool
        select E500MC
        select FSL_LAW
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_50
+       select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5

+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_T1024
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_T1024
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_50
+       select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5

+       select FSL_IFC
+       imply CMD_EEPROM
+       imply CMD_NAND
+       imply CMD_MTDPARTS
+       imply CMD_REGINFO

 
 config ARCH_T1040
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_T1040
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_50
+       select SYS_FSL_ERRATUM_A008044
+       select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5

+       select FSL_IFC
+       imply CMD_MTDPARTS
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_T1042
        bool
        select E500MC
        select FSL_LAW
 
 config ARCH_T1042
        bool
        select E500MC
        select FSL_LAW

+       select SYS_FSL_DDR_VER_50
+       select SYS_FSL_ERRATUM_A008044
+       select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5

+       select FSL_IFC
+       imply CMD_MTDPARTS
+       imply CMD_NAND
+       imply CMD_SATA
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_T2080
        bool
        select E500MC
 
 config ARCH_T2080
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A007815
+       select SYS_FSL_ERRATUM_A007907
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_SATA
+       imply CMD_NAND
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_T2081
        bool
        select E500MC
 
 config ARCH_T2081
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_ESDHC111

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_NAND
+       imply CMD_REGINFO

 
 config ARCH_T4160
        bool
        select E500MC
 
 config ARCH_T4160
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A004468
+       select SYS_FSL_ERRATUM_A005871
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007798
+       select SYS_FSL_ERRATUM_A009942

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_SATA
+       imply CMD_NAND
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config ARCH_T4240
        bool
        select E500MC
 
 config ARCH_T4240
        bool
        select E500MC

+       select E6500

        select FSL_LAW
        select FSL_LAW

+       select SYS_FSL_DDR_VER_47
+       select SYS_FSL_ERRATUM_A004468
+       select SYS_FSL_ERRATUM_A005871
+       select SYS_FSL_ERRATUM_A006261
+       select SYS_FSL_ERRATUM_A006379
+       select SYS_FSL_ERRATUM_A006593
+       select SYS_FSL_ERRATUM_A007186
+       select SYS_FSL_ERRATUM_A007798
+       select SYS_FSL_ERRATUM_A007815
+       select SYS_FSL_ERRATUM_A007907
+       select SYS_FSL_ERRATUM_A009942

        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC

+       select SYS_FSL_QORIQ_CHASSIS2

        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

+       select SYS_PPC64
+       select FSL_IFC
+       imply CMD_SATA
+       imply CMD_NAND
+       imply CMD_REGINFO
+       imply FSL_SATA

 
 config BOOKE
        bool
 
 config BOOKE
        bool


@@ -668,9 +1155,15 @@ config E500
 
 config E500MC
        bool
 
 config E500MC
        bool

+       imply CMD_PCI

        help
                Enble PowerPC E500MC core
 
        help
                Enble PowerPC E500MC core
 

+config E6500
+       bool
+       help
+               Enable PowerPC E6500 core
+

 config FSL_LAW
        bool
        help
 config FSL_LAW
        bool
        help


@@ -762,6 +1255,163 @@ config SYS_CCSRBAR_DEFAULT
                if changed by pre-boot regime. The value here must match
                the current value in SoC. If not sure, do not change.
 
                if changed by pre-boot regime. The value here must match
                the current value in SoC. If not sure, do not change.
 

+config SYS_FSL_ERRATUM_A004468
+       bool
+
+config SYS_FSL_ERRATUM_A004477
+       bool
+
+config SYS_FSL_ERRATUM_A004508
+       bool
+
+config SYS_FSL_ERRATUM_A004580
+       bool
+
+config SYS_FSL_ERRATUM_A004699
+       bool
+
+config SYS_FSL_ERRATUM_A004849
+       bool
+
+config SYS_FSL_ERRATUM_A004510
+       bool
+
+config SYS_FSL_ERRATUM_A004510_SVR_REV
+       hex
+       depends on SYS_FSL_ERRATUM_A004510
+       default 0x20 if ARCH_P4080
+       default 0x10
+
+config SYS_FSL_ERRATUM_A004510_SVR_REV2
+       hex
+       depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
+       default 0x11
+
+config SYS_FSL_ERRATUM_A005125
+       bool
+
+config SYS_FSL_ERRATUM_A005434
+       bool
+
+config SYS_FSL_ERRATUM_A005812
+       bool
+
+config SYS_FSL_ERRATUM_A005871
+       bool
+
+config SYS_FSL_ERRATUM_A006261
+       bool
+
+config SYS_FSL_ERRATUM_A006379
+       bool
+
+config SYS_FSL_ERRATUM_A006384
+       bool
+
+config SYS_FSL_ERRATUM_A006475
+       bool
+
+config SYS_FSL_ERRATUM_A006593
+       bool
+
+config SYS_FSL_ERRATUM_A007075
+       bool
+
+config SYS_FSL_ERRATUM_A007186
+       bool
+
+config SYS_FSL_ERRATUM_A007212
+       bool
+
+config SYS_FSL_ERRATUM_A007815
+       bool
+
+config SYS_FSL_ERRATUM_A007798
+       bool
+
+config SYS_FSL_ERRATUM_A007907
+       bool
+
+config SYS_FSL_ERRATUM_A008044
+       bool
+
+config SYS_FSL_ERRATUM_CPC_A002
+       bool
+
+config SYS_FSL_ERRATUM_CPC_A003
+       bool
+
+config SYS_FSL_ERRATUM_CPU_A003999
+       bool
+
+config SYS_FSL_ERRATUM_ELBC_A001
+       bool
+
+config SYS_FSL_ERRATUM_I2C_A004447
+       bool
+
+config SYS_FSL_A004447_SVR_REV
+       hex
+       depends on SYS_FSL_ERRATUM_I2C_A004447
+       default 0x00 if ARCH_MPC8548
+       default 0x10 if ARCH_P1010
+       default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
+       default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
+
+config SYS_FSL_ERRATUM_IFC_A002769
+       bool
+
+config SYS_FSL_ERRATUM_IFC_A003399
+       bool
+
+config SYS_FSL_ERRATUM_NMG_CPU_A011
+       bool
+
+config SYS_FSL_ERRATUM_NMG_ETSEC129
+       bool
+
+config SYS_FSL_ERRATUM_NMG_LBC103
+       bool
+
+config SYS_FSL_ERRATUM_P1010_A003549
+       bool
+
+config SYS_FSL_ERRATUM_SATA_A001
+       bool
+
+config SYS_FSL_ERRATUM_SEC_A003571
+       bool
+
+config SYS_FSL_ERRATUM_SRIO_A004034
+       bool
+
+config SYS_FSL_ERRATUM_USB14
+       bool
+
+config SYS_P4080_ERRATUM_CPU22
+       bool
+
+config SYS_P4080_ERRATUM_PCIE_A003
+       bool
+
+config SYS_P4080_ERRATUM_SERDES8
+       bool
+
+config SYS_P4080_ERRATUM_SERDES9
+       bool
+
+config SYS_P4080_ERRATUM_SERDES_A001
+       bool
+
+config SYS_P4080_ERRATUM_SERDES_A005
+       bool
+
+config SYS_FSL_QORIQ_CHASSIS1
+       bool
+
+config SYS_FSL_QORIQ_CHASSIS2
+       bool
+

 config SYS_FSL_NUM_LAWS
        int "Number of local access windows"
        depends on FSL_LAW
 config SYS_FSL_NUM_LAWS
        int "Number of local access windows"
        depends on FSL_LAW


@@ -806,6 +1456,11 @@ config SYS_FSL_NUM_LAWS
                Number of local access windows. This is fixed per SoC.
                If not sure, do not change.
 
                Number of local access windows. This is fixed per SoC.
                If not sure, do not change.
 

+config SYS_FSL_THREADS_PER_CORE
+       int
+       default 2 if E6500
+       default 1
+

 config SYS_NUM_TLBCAMS
        int "Number of TLB CAM entries"
        default 64 if E500MC
 config SYS_NUM_TLBCAMS
        int "Number of TLB CAM entries"
        default 64 if E500MC


@@ -814,9 +1469,18 @@ config SYS_NUM_TLBCAMS
                Number of TLB CAM entries for Book-E chips. 64 for E500MC,
                16 for other E500 SoCs.
 
                Number of TLB CAM entries for Book-E chips. 64 for E500MC,
                16 for other E500 SoCs.
 

+config SYS_PPC64
+       bool
+

 config SYS_PPC_E500_USE_DEBUG_TLB
        bool
 
 config SYS_PPC_E500_USE_DEBUG_TLB
        bool
 

+config FSL_IFC
+       bool
+
+config FSL_ELBC
+       bool
+

 config SYS_PPC_E500_DEBUG_TLB
        int "Temporary TLB entry for external debugger"
        depends on SYS_PPC_E500_USE_DEBUG_TLB
 config SYS_PPC_E500_DEBUG_TLB
        int "Temporary TLB entry for external debugger"
        depends on SYS_PPC_E500_USE_DEBUG_TLB


@@ -841,18 +1505,50 @@ config SYS_PPC_E500_DEBUG_TLB
                 symbol should be set to the TLB1 entry to be used for this
                 purpose. If unsure, do not change.
 
                 symbol should be set to the TLB1 entry to be used for this
                 purpose. If unsure, do not change.
 

+config SYS_FSL_IFC_CLK_DIV
+       int "Divider of platform clock"
+       depends on FSL_IFC
+       default 2 if    ARCH_B4420      || \
+                       ARCH_B4860      || \
+                       ARCH_T1024      || \
+                       ARCH_T1023      || \
+                       ARCH_T1040      || \
+                       ARCH_T1042      || \
+                       ARCH_T4160      || \
+                       ARCH_T4240
+       default 1
+       help
+               Defines divider of platform clock(clock input to
+               IFC controller).
+
+config SYS_FSL_LBC_CLK_DIV
+       int "Divider of platform clock"
+       depends on FSL_ELBC || ARCH_MPC8540 || \
+               ARCH_MPC8548 || ARCH_MPC8541 || \
+               ARCH_MPC8555 || ARCH_MPC8560 || \
+               ARCH_MPC8568
+
+       default 2 if    ARCH_P2041      || \
+                       ARCH_P3041      || \
+                       ARCH_P4080      || \
+                       ARCH_P5020      || \
+                       ARCH_P5040
+       default 1
+
+       help
+               Defines divider of platform clock(clock input to
+               eLBC controller).
+

 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"
 source "board/freescale/c29xpcie/Kconfig"
 source "board/freescale/corenet_ds/Kconfig"
 source "board/freescale/mpc8536ds/Kconfig"
 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"
 source "board/freescale/c29xpcie/Kconfig"
 source "board/freescale/corenet_ds/Kconfig"
 source "board/freescale/mpc8536ds/Kconfig"

-source "board/freescale/mpc8540ads/Kconfig"

 source "board/freescale/mpc8541cds/Kconfig"
 source "board/freescale/mpc8544ds/Kconfig"
 source "board/freescale/mpc8548cds/Kconfig"
 source "board/freescale/mpc8555cds/Kconfig"
 source "board/freescale/mpc8541cds/Kconfig"
 source "board/freescale/mpc8544ds/Kconfig"
 source "board/freescale/mpc8548cds/Kconfig"
 source "board/freescale/mpc8555cds/Kconfig"

-source "board/freescale/mpc8560ads/Kconfig"

 source "board/freescale/mpc8568mds/Kconfig"
 source "board/freescale/mpc8569mds/Kconfig"
 source "board/freescale/mpc8572ds/Kconfig"
 source "board/freescale/mpc8568mds/Kconfig"
 source "board/freescale/mpc8569mds/Kconfig"
 source "board/freescale/mpc8572ds/Kconfig"