- * Initialize CPU critical registers
- *
- * 1. Setup control registers
- * 1.1 Mask all IRQs
- * 1.2 Flush cache and TLB
- * 1.3 Disable MMU and cache
- * 2. Setup memory timing
- */
-
-cpu_init_crit:
-
- move $r0, $lp /* push ra */
-
- /* Disable Interrupts by clear GIE in $PSW reg */
- setgie.d
-
- /* Flush caches and TLB */
- /* Invalidate caches */
- bal invalidate_icac
- bal invalidate_dcac
-
- /* Flush TLB */
- mfsr $p0, $MMU_CFG
- andi $p0, $p0, 0x3 ! MMPS
- li $p1, 0x2 ! TLB MMU
- bne $p0, $p1, 1f
- tlbop flushall ! Flush TLB
-
-1:
- ! Disable MMU, Dcache
- ! Whitiger is MMU disabled when reset
- ! Disable the D$
- mfsr $p0, MR_CAC_CTL ! Get the $CACHE_CTL reg
- li $p1, DIS_DCAC
- and $p0, $p0, $p1 ! Set DC_EN bit
- mtsr $p0, MR_CAC_CTL ! write back the $CACHE_CTL reg
- isb
-
- move $lp, $r0
-2:
- ret
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-load_lowlevel_init:
- la $r6, lowlevel_init
- la $r7, load_lli + 4
- sub $p0, $r6, $r7
- add $p0, $p0, $lp
-ret
-#endif
-
-#ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
-load_turnoff_watchdog:
- la $r6, turnoff_watchdog
- la $r7, turnoff_wtdog + 4
- sub $p0, $r6, $r7
- add $p0, $p0, $lp
-ret
-#endif
-
-/*