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ARM: Move SYS_CACHELINE_SIZE over to Kconfig
[platform/kernel/u-boot.git]
/
arch
/
arm
/
mach-mvebu
/
include
/
mach
/
config.h
diff --git
a/arch/arm/mach-mvebu/include/mach/config.h
b/arch/arm/mach-mvebu/include/mach/config.h
index
9dde710
..
1b35e08
100644
(file)
--- a/
arch/arm/mach-mvebu/include/mach/config.h
+++ b/
arch/arm/mach-mvebu/include/mach/config.h
@@
-17,11
+17,20
@@
#include <asm/arch/soc.h>
#include <asm/arch/soc.h>
-#if defined(CONFIG_ARMADA_XP)
+#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
+ || defined(CONFIG_ARMADA_38X)
+/*
+ * Set this for the common xor register definitions needed in dram.c
+ * for A38x as well here.
+ */
#define MV88F78X60 /* for the DDR training bin_hdr code */
#endif
#define MV88F78X60 /* for the DDR training bin_hdr code */
#endif
-#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_SYS_L2_PL310
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#endif
/*
* By default kwbimage.cfg from board specific folder is used
/*
* By default kwbimage.cfg from board specific folder is used
@@
-47,8
+56,7
@@
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
-#define CONFIG_HARD_SPI 1
-#define CONFIG_KIRKWOOD_SPI 1
+#define CONFIG_KIRKWOOD_SPI
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif
@@
-60,16
+68,22
@@
#endif
#endif
#endif
#endif
+/* Needed for SPI NOR booting in SPL */
+#define CONFIG_DM_SEQ_ALIAS 1
+
/*
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
/*
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
-#define CONFIG_CMD_MII
#define CONFIG_MII /* expose smi ove miiphy interface */
#define CONFIG_MII /* expose smi ove miiphy interface */
+#if !defined(CONFIG_ARMADA_375)
#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
#define CONFIG_PHYLIB
#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
#define CONFIG_PHYLIB
+#endif
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
+#define CONFIG_ARP_TIMEOUT 200
+#define CONFIG_NET_RETRY_COUNT 50
#endif /* CONFIG_CMD_NET */
/*
#endif /* CONFIG_CMD_NET */
/*
@@
-83,9
+97,9
@@
#define CONFIG_SYS_I2C_SPEED 100000
#endif
#define CONFIG_SYS_I2C_SPEED 100000
#endif
-/*
Common SPL configuration
*/
-#
ifndef CONFIG_SPL_LDSCRIPT
-#define CONFIG_S
PL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds"
-#
endif
+/*
Use common timer
*/
+#
define CONFIG_SYS_TIMER_COUNTS_DOWN
+#define CONFIG_S
YS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
+#
define CONFIG_SYS_TIMER_RATE 25000000
#endif /* __MVEBU_CONFIG_H */
#endif /* __MVEBU_CONFIG_H */