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Merge tag 'u-boot-imx-20200825' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
[platform/kernel/u-boot.git]
/
arch
/
arm
/
dts
/
zynqmp-zc1751-xm015-dc1.dts
diff --git
a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index
8824f5c
..
e2428ec
100644
(file)
--- a/
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@
-2,7
+2,7
@@
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
- * (C) Copyright 2015 - 20
18
, Xilinx, Inc.
+ * (C) Copyright 2015 - 20
20
, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@
-75,7
+75,7
@@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0 {
+ phy0:
ethernet-
phy@0 {
reg = <0>;
};
};
reg = <0>;
};
};
@@
-108,19
+108,19
@@
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
- partition@
qspi-fsbl-uboot
{ /* for testing purpose */
+ partition@
0
{ /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
- partition@
qspi-linux
{ /* for testing purpose */
+ partition@
100000
{ /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
- partition@
qspi-device-tree
{ /* for testing purpose */
+ partition@
600000
{ /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
- partition@
qspi-rootfs
{ /* for testing purpose */
+ partition@
620000
{ /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
@@
-148,14
+148,17
@@
&sdhci0 {
status = "okay";
bus-width = <8>;
&sdhci0 {
status = "okay";
bus-width = <8>;
- xlnx,mio
_
bank = <0>;
+ xlnx,mio
-
bank = <0>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
- no-1-8-v; /* for 1.0 silicon */
- xlnx,mio_bank = <1>;
+ /*
+ * This property should be removed for supporting UHS mode
+ */
+ no-1-8-v;
+ xlnx,mio-bank = <1>;
};
&uart0 {
};
&uart0 {
@@
-172,32
+175,23
@@
dr_mode = "host";
};
dr_mode = "host";
};
-&
xilinx_drm
{
+&
zynqmp_dpsub
{
status = "okay";
};
status = "okay";
};
-&
xlnx_dp
{
+&
zynqmp_dp_snd_pcm0
{
status = "okay";
};
status = "okay";
};
-&
xlnx_dp_sub
{
+&
zynqmp_dp_snd_pcm1
{
status = "okay";
status = "okay";
- xlnx,vid-clk-pl;
};
};
-&
xlnx_dp_snd_pcm
0 {
+&
zynqmp_dp_snd_card
0 {
status = "okay";
};
status = "okay";
};
-&xlnx_dp_snd_pcm1 {
- status = "okay";
-};
-
-&xlnx_dp_snd_card {
- status = "okay";
-};
-
-&xlnx_dp_snd_codec0 {
+&zynqmp_dp_snd_codec0 {
status = "okay";
};
status = "okay";
};